PIC16F818/819
TABLE 15-6: SPI™ MODE REQUIREMENTS
Param
No.
Symbol
Characteristic
SS ↓ to SCK ↓ or SCK ↑ Input
Min
Typ† Max Units Conditions
70*
TSSL2SCH,
TSSL2SCL
TCY
—
—
ns
71*
72*
73*
TSCH
TSCL
SCK Input High Time (Slave mode)
SCK Input Low Time (Slave mode)
Setup Time of SDI Data Input to SCK Edge
TCY + 20
TCY + 20
100
—
—
—
—
—
—
ns
ns
ns
TDIV2SCH,
TDIV2SCL
74*
75*
TSCH2DIL,
TSCL2DIL
Hold Time of SDI Data Input to SCK Edge
100
—
—
ns
TDOR
SDO Data Output Rise Time
PIC16F818/819
—
—
10
25
25
50
ns
ns
PIC16LF818/819
76*
77*
78*
TDOF
SDO Data Output Fall Time
—
10
—
25
50
ns
ns
TSSH2DOZ
TSCR
SS ↑ to SDO Output High-Impedance
10
SCK Output Rise Time
(Master mode)
PIC16F818/819
PIC16LF818/819
—
—
10
25
25
50
ns
ns
79*
80*
TSCF
SCK Output Fall Time (Master mode)
—
10
25
ns
TSCH2DOV,
TSCL2DOV
SDO Data Output Valid after SCK
Edge
PIC16F818/819
PIC16LF818/819
—
—
—
—
50
145
ns
ns
81*
TDOV2SCH, SDO Data Output Setup to SCK Edge
TDOV2SCL
TCY
—
—
ns
82*
83*
TSSL2DOV
SDO Data Output Valid after SS ↓ Edge
—
—
—
50
—
ns
ns
TSCH2SSH, SS ↑ after SCK Edge
1.5 TCY + 40
TSCL2SSH
*
These parameters are characterized but not tested.
†
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
FIGURE 15-14:
I2C™ BUS START/STOP BITS TIMING
SCL
SDA
91
93
90
92
Stop
Condition
Start
Condition
Note: Refer to Figure 15-3 for load conditions.
DS39598E-page 138
2004 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
