PIC16C55X(A)
FIGURE 3-1:
BLOCK DIAGRAM
Program
Memory
Data Memory
(RAM)
Device
PIC16C554
PIC16C554A
PIC16C556A
PIC16C558
PIC16C558A
512 x 14
80 x 8
80 x 8
80 x 8
128 x 8
128 x 8
512 x 14
1K x 14
2K x 14
2K x 14
13
8
PORTA
EPROM
Data Bus
RAM
Program Counter
Program
Memory
RA0
RA1
RA2
RA3
512 x 14
to
2K x 14
File
8 Level Stack
(13-bit)
Registers
80 x 8 to
128 x 8
RA4/T0CKI
Program
Bus
14
RAM Addr(1)
PORTB
8
Addr MUX
Instruction reg
RB0/INT
RB7:RB1
Indirect
Addr
7
Direct Addr
8
FSR reg
STATUS reg
8
3
MUX
Power-up
Timer
Oscillator
Instruction
Decode &
Control
Start-up Timer
ALU
Power-on
Reset
8
Timing
Generation
Watchdog
Timer
W reg
OSC1/CLKIN
OSC2/CLKOUT
Timer0
MCLR VDD, VSS
Note 1: Higher order bits are from the status register.
DS40143B-page 10
Preliminary
1997 Microchip Technology Inc.