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12C508A 参数 Datasheet PDF下载

12C508A图片预览
型号: 12C508A
PDF下载: 下载PDF文件 查看货源
内容描述: 8引脚, 8位CMOS微控制器 [8-Pin, 8-Bit CMOS Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 113 页 / 1509 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC12C5XX  
4.8  
Indirect Data Addressing; INDF and  
FSR Registers  
EXAMPLE 4-2: HOW TO CLEAR RAM  
USING INDIRECT  
ADDRESSING  
The INDF register is not  
a physical register.  
movlw  
movwf  
clrf  
incf  
btfsc  
goto  
0x10  
;initialize pointer  
Addressing INDF actually addresses the register  
whose address is contained in the FSR register (FSR  
is a pointer). This is indirect addressing.  
FSR  
;
to RAM  
NEXT  
INDF  
FSR,F  
FSR,4  
NEXT  
;clear INDF register  
;inc pointer  
;all done?  
;NO, clear next  
EXAMPLE 4-1: INDIRECT ADDRESSING  
• Register file 07 contains the value 10h  
• Register file 08 contains the value 0Ah  
• Load the value 07 into the FSR register  
• A read of the INDF register will return the value  
of 10h  
CONTINUE  
:
;YES, continue  
The FSR is  
a 5-bit wide register. It is used in  
conjunction with the INDF register to indirectly address  
the data memory area.  
• Increment the value of the FSR register by one  
(FSR = 08)  
The FSR<4:0> bits are used to select data memory  
addresses 00h to 1Fh.  
• A read of the INDR register now will return the  
value of 0Ah.  
PIC12C508/PIC12C508A/PIC12CE518:  
use banking. FSR<7:5> are unimplemented and read  
as '1's.  
Does not  
Reading INDF itself indirectly (FSR = 0) will produce  
00h. Writing to the INDF register indirectly results in a  
no-operation (although STATUS bits may be affected).  
PIC12C509/PIC12C509A/PIC12CR509A/  
PIC12CE519: Uses FSR<5>. Selects between bank 0  
and bank 1. FSR<7:6> is unimplemented, read as '1’ .  
A simple program to clear RAM locations 10h-1Fh  
using indirect addressing is shown in Example 4-2.  
FIGURE 4-9: DIRECT/INDIRECT ADDRESSING  
Direct Addressing  
Indirect Addressing  
(FSR)  
4
(opcode)  
0
5
(FSR)  
0
6
4
5
6
bank select location select  
location select  
bank  
00  
01  
00h  
Addresses  
map back to  
addresses  
in Bank 0.  
Data  
Memory(1)  
0Fh  
10h  
1Fh  
Bank 0  
3Fh  
Bank 1(2)  
Note 1: For register map detail see Section 4.2.  
Note 2: PIC12C509, PIC12C509A, PIC12CR509A, PIC12CE519.  
DS40139E-page 20  
1999 Microchip Technology Inc.  
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