11AAXXX/11LCXXX
The ERAL instruction is ignored if either of the Block
Protect bits (BP0, BP1) are not 0, meaning 1/4, 1/2, or
all of the array is protected.
4.7
Erase All (ERAL) Instruction
The ERALinstruction allows the user to write ‘0x00’ to
the entire memory array with one command. Note that
the write enable latch (WEL) must first be set by issuing
the WRENinstruction.
Note: The ERAL instruction must be termi-
nated with a NoMAK following the com-
mand byte. If a NoMAK is not received at
this point, the command will be consid-
ered invalid, and the device will go into
Idle mode without responding with a
SAK or executing the command.
Once the write enable latch is set, the user may pro-
ceed with issuing a ERAL instruction (including the
header and device address bytes). Immediately after
the NoMAK bit has been transmitted by the master, the
internal write cycle is initiated, during which time all
words of the memory array are written to ‘0x00’.
FIGURE 4-8:
ERASE ALL COMMAND SEQUENCE
Device Address
Standby Pulse
Start Header
SCIO
0 1 0 1 0 1 0 1
1 0 1 0 0 0 0 0(1)
Command
SCIO
0 1 1 0 1 1 0 1
Twc
Note 1: For the 11XXXX1, this bit must be a ‘1’.
The SETAL instruction is ignored if either of the Block
Protect bits (BP0, BP1) are not 0, meaning 1/4, 1/2, or
all of the array is protected.
4.8
Set All (SETAL) Instruction
The SETALinstruction allows the user to write ‘0xFF’
to the entire memory array with one command. Note
that the write enable latch (WEL) must first be set by
issuing the WRENinstruction.
Note: The SETAL instruction must be termi-
nated with a NoMAK following the com-
mand byte. If a NoMAK is not received at
this point, the command will be consid-
ered invalid, and the device will go into
Idle mode without responding with a
SAK or executing the command.
Once the write enable latch is set, the user may pro-
ceed with issuing a SETAL instruction (including the
header and device address bytes). Immediately after
the NoMAK bit has been transmitted by the master, the
internal write cycle is initiated, during which time all
words of the memory array are written to ‘0xFF’.
FIGURE 4-9:
SET ALL COMMAND SEQUENCE
Device Address
Standby Pulse
Start Header
SCIO
0 1 0 1 0 1 0 1
1 0 1 0 0 0 0 0(1)
Command
SCIO
0 1 1 0 0 1 1 1
Twc
Note 1: For the 11XXXX1, this bit must be a ‘1’.
DS22067H-page 16
Preliminary
2010 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
