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11AA02UID-I/TT 参数 Datasheet PDF下载

11AA02UID-I/TT图片预览
型号: 11AA02UID-I/TT
PDF下载: 下载PDF文件 查看货源
内容描述: [2K UNI/O® Serial EEPROM with Unique 32-Bit Serial Number]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 32 页 / 666 K
品牌: MICROCHIP [ MICROCHIP ]
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11AA02UID  
TABLE 4-2:  
INTERNAL ADDRESS  
COUNTER  
4.2  
Current Address Read (CRRD)  
Instruction  
Command  
Event  
Action  
The internal address counter featured on the  
11AA02UID maintains the address of the last memory  
array location accessed. The CRRDinstruction allows  
the master to read data back beginning from this  
current location. Consequently, no word address is  
provided upon issuing this command.  
Power-on Reset Counter is undefined  
Read or  
Write  
MAK edge  
following each  
Address byte  
Counter is updated  
with newly received  
value  
Read,  
Write, or  
CRRD  
MAK/NoMAK  
edge following  
each data byte  
Counter is incre-  
mented by 1  
Note that, except for the initial word address, the  
READ and CRRD instructions are identical, including  
the ability to continue requesting data through the use  
of MAKs in order to sequentially read from the array.  
Note:  
If, following each data byte in a READ,  
WRITE, or CRRD instruction, neither a  
MAK nor a NoMAK edge is received (i.e.,  
if a standby pulse occurs instead), the  
internal address counter will not be incre-  
mented.  
As with the READinstruction, the CRRDinstruction is  
terminated by transmitting a NoMAK.  
Table 4-2 lists the events upon which the internal  
address counter is modified.  
Note:  
During a Write command, once the last  
data byte for a page has been loaded, the  
internal Address Pointer will rollover to the  
beginning of the selected page.  
FIGURE 4-2:  
CRRD COMMAND SEQUENCE  
Device Address  
Standby Pulse  
Start Header  
SCIO  
0 1 0 1 0 1 0 1  
1 0 1 0 0 0 0 0  
Command  
Data Byte 1  
Data Byte 2  
7 6 5 4 3 2 1 0  
7 6 5 4 3 2 1 0  
SCIO  
SCIO  
0 0 0 0 0 1 1 0  
Data Byte n  
7 6 5 4 3 2 1 0  
DS20005206A-page 10  
2013 Microchip Technology Inc.