11AA02UID
TABLE 4-3:
BP1
ARRAY PROTECTION
4.6
Write Status Register (WRSR)
Instruction
Array Addresses
Write-Protected
BP0
The WRSRinstruction allows the user to select one of
four levels of protection for the array by writing to the
appropriate bits in the STATUS register. The array is
divided up into four segments. The user has the ability
to write-protect none, one, two, or all four of the seg-
ments of the array. The partitioning is controlled as
illustrated in Table 4-3.
none
0
0
0
1
upper 1/4
(C0h-FFh)
upper 1/2
(80h-FFh)
1
1
0
1
all
After transmitting the STATUS register data, the master
must transmit a NoMAK during the Acknowledge
sequence in order to initiate the internal write cycle.
(00h-FFh)
Note:
The WRSRinstruction must be terminated
with a NoMAK following the data byte. If a
NoMAK is not received at this point, the
command will be considered invalid, and
the device will go into Idle mode without
responding with a SAK or executing the
command.
FIGURE 4-7:
WRITE STATUS REGISTER COMMAND SEQUENCE
Device Address
Standby Pulse
Start Header
SCIO
0 1 0 1 0 1 0 1
1 0 1 0 0 0 0 0
Command
Status Register Data
7 6 5 4 3 2 1 0
SCIO
Twc
0 1 1 0 1 1 1 0
DS20005206A-page 14
2013 Microchip Technology Inc.
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