11AA02E48/11AA02E64
2.0
2.1
FUNCTIONAL DESCRIPTION
Principles of Operation
The 11AA02EXX family of serial EEPROMs support
the UNI/O® protocol. They can be interfaced with
microcontrollers,
including
Microchip’s
PIC®
microcontrollers, ASICs, or any other device with an
available discrete I/O line that can be configured
properly to match the UNI/O protocol.
The 11AA02EXX devices contain an 8-bit instruction
register. The devices are accessed via the SCIO pin.
Data is embedded into the I/O stream through
Manchester encoding. The bus is controlled by a
master device which determines the clock period,
controls the bus access and initiates all operations,
while the 11AA02EXX works as slave. Both master
and slave can operate as transmitter or receiver, but
the master device determines which mode is active.
FIGURE 2-1:
BLOCK DIAGRAM
STATUS
Register
HV Generator
EEPROM
Array
Memory
Control
Logic
X
I/O Control
Logic
Dec
Page Latches
Y Decoder
Current-
Limited
Slope
Control
SCIO
Sense Amp.
R/W Control
VCC
VSS
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