11AA02E48/11AA02E64
The Block Protection (BP0 and BP1) bits indicate
which blocks are currently write-protected. These bits
are set by the user through the WRSRinstruction. These
bits are nonvolatile.
4.5
Read Status Register (RDSR)
Instruction
The RDSRinstruction provides access to the STATUS
register. The STATUS register may be read at any time,
even during a write cycle. The STATUS register is
formatted as follows:
Note:
If Read Status Register command is
initiated while the 11AA02EXX is currently
executing an internal write cycle on the
STATUS register, the new Block
Protection bit values will be read during
the entire command.
7
6
5
4
3
2
1
0
X
X
X
X
BP1
BP0
WEL
WIP
Note: Bits 4-7 are don’t cares, and will read as ‘0’.
The WIP and WEL bits will update dynamically
(asynchronous to issuing the RDSR instruction).
Furthermore, after the STATUS register data is
received, the master can provide a MAK during the
Acknowledge sequence to request that the data be
transmitted again. This allows the master to
continuously monitor the WIP and WEL bits without the
need to issue another full command.
The Write-In-Process (WIP) bit indicates whether the
11AA02EXX is busy with a write operation. When set to
a ‘1’, a write is in progress, when set to a ‘0’, no write is
in progress. This bit is read-only.
The Write Enable Latch (WEL) bit indicates the status
of the write enable latch. When set to a ‘1’, the latch
allows writes to the array, when set to a ‘0’, the latch
prohibits writes to the array. This bit is set and cleared
using the WREN and WRDI instructions, respectively.
This bit is read-only for any other instruction.
Once the master is finished, it provides a NoMAK to
end the operation.
Note:
The current drawn for a Read Status
Register command during a write cycle is
a combination of the ICC Read and ICC
Write operating currents.
FIGURE 4-6:
READ STATUS REGISTER COMMAND SEQUENCE
Device Address
Standby Pulse
Start Header
SCIO
0 1 0 1 0 1 0 1
1 0 1 0 0 0 0 0
Command
STATUS Register Data
3 2 1 0
SCIO
0 0 0 0 0 1 0 1
0 0 0 0
Note: The STATUS register data can continuously be read or polled by transmitting a MAK in place of the NoMAK.
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DS20002122D-page 13
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