11AAXXX/11LCXXX
TABLE 4-2:
INTERNAL ADDRESS
COUNTER
4.2
Current Address Read (CRRD)
Instruction
Command
Event
Action
The internal address counter featured on the 11XX
maintains the address of the last memory array loca-
tion accessed. The CRRDinstruction allows the mas-
ter to read data back beginning from this current
location. Consequently, no word address is provided
upon issuing this command.
—
Power-on Reset Counter is undefined
READor
WRITE
MAK edge fol-
lowing each
Address byte
Counter is updated
with newly received
value
READ,
MAK/NoMAK
Counter is incre-
mented by 1
Note that, except for the initial word address, the
READ and CRRD instructions are identical, including
the ability to continue requesting data through the use
of MAKs in order to sequentially read from the array.
WRITE, or edge following
CRRD each data byte
Note: If, following each data byte in a READ,
WRITE, or CRRD instruction, neither a
MAK nor a NoMAK edge is received
(i.e., if a standby pulse occurs instead),
the internal address counter will not be
incremented.
As with the READinstruction, the CRRDinstruction is
terminated by transmitting a NoMAK.
Table 4-2 lists the events upon which the internal
address counter is modified.
Note: During a Write command, once the last
data byte for a page has been loaded,
the internal Address Pointer will rollover
to the beginning of the selected page.
FIGURE 4-2:
CRRD COMMAND SEQUENCE
Device Address
Standby Pulse
Start Header
SCIO
0 1 0 1 0 1 0 1
1 0 1 0 0 0 0 0(1)
Command
Data Byte 1
Data Byte 2
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
SCIO
0 0 0 0 0 1 1 0
Data Byte n
SCIO
7 6 5 4 3 2 1 0
Note 1: For the 11XXXX1, this bit must be a ‘1’.
2010 Microchip Technology Inc.
Preliminary
DS22067H-page 11
MICROCHIP [ MICROCHIP ]
