ML6695
PIN CONFIGURATION
ML6695
44-Pin PLCC (Q44)
6
5 4 3 2 1 44 43 42 41 40
PWRDN
RSM4
RSM3
DGND1 10
RSM2 11
7
8
9
39 IOUT
38 IOUT
37 AGND3
36 RTSET
35 AV 3A
CC
DV
1
12
13
14
15
16
17
34 AV 3B
CC
CC
33
32
31
30
29
RSM1
DGND2
RSM0
RXC
DGND3
AV 4A
AGND4A
CC
AV 4B
CC
V
V
+
–
IN
IN
18 19 20 21 22 23 24 25 26 27 28
TOP VIEW
PIN DESCRIPTION
PIN
NAME
FUNCTION
PIN
NAME
FUNCTION
1
A
1
Analog ground
5
TSM1
Transmit data TTL inputs. TSM 0-4
inputs accept TX data symbols
from the MII. Data appearing at
TSM 0-4 are clocked into the
ML6695 on the rising edge of TXC.
GND
2
TSM4
TSM3
TSM2
Transmit data TTL inputs. TSM 0-4
inputs accept TX data symbols
from the MII. Data appearing at
TSM 0-4 are clocked into the
ML6695 on the rising edge of
TXCLK .
6
7
8
TSM0
Transmit data TTL inputs. TSM 0-4
inputs accept TX data symbols
from the MII. Data appearing at
TSM 0-4 are clocked into the
ML6695 on the rising edge of TXC.
3
4
Transmit data TTL inputs. TSM 0-4
inputs accept TX data symbols
from the MII. Data appearing at
TSM 0-4 are clocked into the
ML6695 on the rising edge of
TXC.
PWRDN
PowerdownTTL input. Driving this
pin low, or floating the pin, powers
the ML6695 down to a low-
current, inoperative state. Driving
PWRDN high enables the
ML6695.
Transmit data TTL inputs. TSM 0-4
inputs accept TX data symbols
from the MII. Data appearing at
TSM 0-4 are clocked into the
ML6695 on the rising edge of
TXC.
RSM4
Receive data TTL outputs. RSM 0-
4 output may be sampled
synchronously with RXC’s rising
edge.
2
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
