欢迎访问ic37.com |
会员登录 免费注册
发布采购

ML6694CQ 参数 Datasheet PDF下载

ML6694CQ图片预览
型号: ML6694CQ
PDF下载: 下载PDF文件 查看货源
内容描述: 用5位接口100BASE -TX的物理层 [100BASE-TX Physical Layer with 5-Bit Interface]
分类和应用: 电信集成电路以太网:16GBASE-T
文件页数/大小: 12 页 / 179 K
品牌: MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
 浏览型号ML6694CQ的Datasheet PDF文件第1页浏览型号ML6694CQ的Datasheet PDF文件第2页浏览型号ML6694CQ的Datasheet PDF文件第3页浏览型号ML6694CQ的Datasheet PDF文件第5页浏览型号ML6694CQ的Datasheet PDF文件第6页浏览型号ML6694CQ的Datasheet PDF文件第7页浏览型号ML6694CQ的Datasheet PDF文件第8页浏览型号ML6694CQ的Datasheet PDF文件第9页  
ML6694
PIN DESCRIPTION
(Continued)
PIN
NAME
DESCRIPTION
39
(33)
CMREF
Receiver common-mode reference output. This pin provides a common-mode bias
point for the twisted-pair media line receiver. A typical value for CMREF is
(VCC–1.26)V.
40,41 (34,35)
10BTTXINN/P 10BASE-T transmit waveform inputs. The ML6694 presents a linear copy of the input
at 10BTTXINN/P to the TPOUTN/P outputs when the ML6694 functions in 10BASE-T
mode. Signals presented to these pins must be centered at V
CC
/2 with a single ended
amplitude of
±
0.25V.
LPBK
Loopback TTL input pin. Tying this pin to ground places the part in loopback mode;
data at RSM<4:0> are serialized, MLT-3 encoded, equalized then sent to the receive
PLL for clock recovery and sent to the RSM<4:0> outputs. Floating this pin or tying it
to V
CC
places the part in its normal mode of operation.
Analog +5V power supply.
Transmit clock TTL input. This 25MHz clock is the frequency reference for the
internal transmit PLL clock multiplier. This pin should be driven by an external
25MHz clock at TTL or CMOS levels.
42
(36)
43
44
(37)
(38)
AVCC1
TXC
4