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ML6672 参数 Datasheet PDF下载

ML6672图片预览
型号: ML6672
PDF下载: 下载PDF文件 查看货源
内容描述: ATM双绞线收发器 [ATM UTP Transceiver]
分类和应用: 异步传输模式ATM
文件页数/大小: 8 页 / 251 K
品牌: MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
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ML6672
PIN CONFIGURATION
ML6672
32-Pin PLCC (Q32)
RXOUT–
RVCCA
CMREF
TPIN+
RRSET2
TPIN–
CAP1
CAP2
ML6672
32-Pin TQFP (H32-7)
TGNDA
25
24 TPOUT–
23 TPOUT+
22 RTSET2
21 RTSET1
20 TVCCD
19 TXIN–
18 TXIN+
17 N/C
9
10
11
12
13
14
15
16
4
RXOUT+ 5
RVCCD 6
SD– 7
SD+ 8
N/C 9
TGNDD 10
LPBK 11
TXOFF 12
N/C 13
3
2
1
32 31 30
29 RRSET1
28 RRSET2
27 RSET1
26 RSET2
25 RGND
24 RTH1
23 RTH2
22 TVCCA
21 TGNDA
RRSET1 1
TPIN– 2
TPIN+ 3
CMREF 4
CAP2 5
CAP1 6
RVCCA 7
RXOUT– 8
32
31
30
29
28
27
RXOUT+
RVCCD
N/C
SD–
TGNDD
LPBK
TXIN–
TVCCD
TXIN+
RTSET1
RTSET2
TPOUT+
PIN DESCRIPTION
NAME
FUNCTION
NAME
FUNCTION
TX
IN
+, TX
IN
TPOUT+,
TPOUT–
LPBK
TXOFF
RTSET1,
RTSET2
TVCCA,
TVCCD
TGNDA,
TGNDD
SD+, SD–
TPIN+, TPIN–
These differential ECL100K compatible
inputs receive NRZ data from the PHY for
transmission.
Outputs from the NRZ buffer drive these
differential current outputs. The
transmitter filter/transformer module
connects the media to these pins.
This TTL input enables transmitter-
Receiver loopback internally when
asserted low.
This TTL input forces the NRZ buffer to a quiet
state when asserted low.
An external 1% resistor connected
between these pins controls the
transmitter output current amplitude.
I
OUT
= 64 x 1.25V/RTSET
Separate analog and digital
transmitter power supply pins help to
isolate sensitive circuitry from noise
generating digital functions. Both supplies
are nominally +5 volts.
Analog and digital transmitter grounds
provide separate return paths for clean
and noisy signals.
These differential ECL100K compatible
outputs indicate the presence of a data
signal with an amplitude exceeding a
preset threshold.
NRZ encoded data from the receiver filter/
transformer module enters the Receiver
through these pins.
TPOUT–
RXOUT+,
RXOUT–
CAP1, CAP2
RRSET1,
RRSET2
CMREF
RVCCA,
RVCCD
RGND
RSET1, RSET2
RTH1, RTH2
Differential ECL100K compatible outputs
provide NRZ encoded data to the PHY.
Two external capacitors connected to
these pins sets the time constant for the
adaptation in the equalizer loop as well
as for signal detect response.
Internal time constants controlling the
equalizer’s transfer function are set by an
external resistor connected across these
pins.
This pin provides a DC common mode
reference point for the receiver inputs.
Analog and digital supply pins are
separated to isolate clean and noisy
circuit functions. Both supplies are
nominally +5 volts.
Receiver ground.
An external 5kW resistor across these pins
sets up an internal reference current.
An external resistor connected across
these pins sets the internal levels for
equalization as well as signal detect. This
resistor allows compensation for transmit
and magnetics variations. RTH should be
set to match the peak-to-peak transmit
amplitude. V
AMP
= 16 x 1.25 x RTH/RSET
where V
AMP
is the peak-to-peak
amplitude of the transmit output with
zero length cable.
2
TXOFF
SD+
14 15 16 17 18 19 20
TVCCA
26
RGND
RSET1
RSET2
RTH1
RTH2