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ML6622IS 参数 Datasheet PDF下载

ML6622IS图片预览
型号: ML6622IS
PDF下载: 下载PDF文件 查看货源
内容描述: 高速数据量化 [High-Speed Data Quantizer]
分类和应用:
文件页数/大小: 6 页 / 97 K
品牌: MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
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ML6622  
PIN DESCRIPTION  
PIN# NAME  
FUNCTION  
NAME PIN #  
FUNCTION  
1
ENABLE  
ECL input active low. When this input  
is tied to LINKLED the ECL comparator  
output is automatically enabled and  
disabled by the Link Detect circuit.  
This input can be tied to GND for  
continuous enable. When the ECL  
Comparator is disabled, ECL OUT–  
goes low and ECL OUT+ goes high.  
10  
THIN  
Threshold Input. A voltage applied to  
this input pin sets the minimum  
amplitude of the input signal required  
to cause the link detect to activate. In  
most cases this can be tied to V  
.
REF  
11  
GNDA  
Ground connection for noise sensitive  
circuits in the chip; the input amplifier,  
DC restoration loop, part of the  
Comparator and part of the link detect  
circuit. In some system designs, it may  
be advantageous to separate GND and  
GNDA.  
2
3
LINKLED  
Link Detect Status output. LINKLED is  
an open collector active low signal. It  
will be active low when the input  
signal applied to V ,V  
exceeds  
IN+ IN–  
the programmed threshold level at the  
THIN pin. Capable of driving a 20mA  
LED indicator.  
12  
13  
14  
V
IN–  
This input pin should be capacitively  
coupled to the input source or to V A.  
CC  
V
IN+  
This input pin should be capacitively  
V
CC  
Positive Power Supply. +5 volts  
coupled to the input source or to V A.  
CC  
4
5
ECL OUT+ Positive and Negative ECL Comparator  
ECL OUT– outputs. 1mA internal pull downs are  
incorporated.  
V
CC  
A
Positive power supply V for noise  
CC  
sensitive circuits as mentioned in  
GNDA. +5 volts.  
6
7
GND  
Ground connection. Used for less  
noise sensitive nodes.  
15  
CAP  
A capacitor is tied from this pin to  
V
. This capacitor sets the lower  
REF  
LINK+  
Positive ECL Link Detect output. Active  
high when the input signal exceeds the  
programmed Link Detect threshold.  
1mA internal pull down current  
sources.  
frequency rejection and helps remove  
internal DC offset. This capacitor  
should be 10 times larger than the  
input capacitors.  
16  
C
TIMER  
A capacitor from this pin to ground  
determines the Link Detect response  
time. To Meet FDDI specifications this  
capacitor should be 2,000pF. This  
capacitor can be removed for faster  
response time.  
8
9
LINK –  
Negative ECL Link Detect output.  
Active low when the input signal  
exceeds the programmed Link Detect  
threshold. 1mA internal pull down  
current sources.  
V
A 2.5V reference with respect to GND.  
REF  
PIN CONNECTION  
ML6622  
16-Pin Narrow SOIC (S16N)  
ENABLE  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CTIMER  
CAP  
LINKLED  
V
V
V
V
A
CC  
CC  
ECL OUT+  
ECL OUT–  
GND  
+
IN  
IN  
GNDA  
THIN  
LINK+  
LINK–  
V
REF  
TOP VIEW  
2
Micro Linear