ML6440
PIN DESCRIPTION
PIN NAME
FUNCTION
PIN NAME
FUNCTION
1
2
3
4
5
6
C2
Chrominance output
Chrominance output
Chrominance output
Digital ground pin
Digital supply pin
20
21
22
23
24
25
YI2/CV2
Luma or composite video input signal
Luma or composite video input signal
Luma or composite video input signal
Luma or composite video input signal
Luma or composite video input signal
C1
YI3/CV3
YI4/CV4
YI5/CV5
YI6/CV6
YI7/CV7
C0
GND
V
CC
RST
Reset input active low. Resets comb
logic including the internal data
register. Required at power up.
Luma or composite video (MSB) input
signal
26
S/P
Serial/Parallel program mode. If high,
allows 8-bit parallel control using the
eight digital chrominance input pins.
Data clocks in on the positive edge
transition. If low, serial port active.
7
8
CLK
TTL compatible clock reference
CI0/DI0
(LSB) Input Chrominance signal (PAL/
NTSC control pin in control pin mode:
register bit D0)
27
OE
Output enable. (Y[7:0] and C[7:0]) If
low, outputs high impedance.
9
CI1/DI1
CI2/DI2
CI3/DI3
CI4/DI4
CI5/DI5
CI6/DI6
CI7/DI7
Input Chrominance signal (Square
Pixel/CCIR control pin in control pin
mode: register bit D1)
28
29
S DATA
S CLK
Serial data input
10
11
12
13
14
15
16
Input Chrominance signal. (Comb
mode 0 control pin in control pin
mode: register bit D2)
Serial clock input. Positive-edge
clocks.
30
Y7
TTL compatible luminance output
(MSB)
Input Chrominance signal (Comb
mode 1 control pin in control pin
mode: register bit D3)
31
32
33
34
35
36
37
38
39
40
Y6
Luminance output
Luminance output
Luminance output
Luminance output
Luminance output
Luminance output
Luminance output (LSB)
Digital ground pin
Digital supply pin
Input Chrominance signal (Adaption
Threshold 0 control pin in control pin
mode: register bit D4)
Y5
Y4
Input Chrominance signal (Adaption
Threshold 1 control pin mode: register
bit D5)
Y3
Y2
Input Chrominance signal (Adaption
Threshold 2 control pin mode: register
bit D6)
Y1
Y0
(MSB) Input Chrominance
(Y+C/YI control pin in control pin
mode: register bit D7)
GND
V
CC
AV
Analog supply pin. Bypass to ground
with 1µF ceramic capacitor
C7
TTL compatible chrominance output
(LSB)
CC
17
18
GND
Ground pin for analog delay line
41
42
43
44
C6
C5
C4
C3
Chrominance output
Chrominance output
Chrominance output
Chrominance output
YI0/CV0
TTL compatible (LSB) Input composite
video signal or Y in the Y+C bypass
mode
19
YI1/CV1
Luma or composite video input signal
3
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
