ML6426
PIN CONFIGURATION
ML6426
16-Pin Narrow SOIC (S16N)
A/B MUX
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SYNC IN
DISABLE
GNDO
R
A/Y
A
IN
IN
GND
V
R
/Y
OUT OUT
CC
R
B/Y
B
V
CCO
IN
IN
G
A/U
A
G
/U
OUT OUT
IN
IN
IN
G
B/U
A/V
B
B
B
/V
OUT OUT
IN
IN
B
A
B/V
B
IN
IN
IN
TOP VIEW
PIN DESCRIPTION
PIN NAME
FUNCTION
PIN NAME
FUNCTION
1
2
A/B MUX
Logic input pin to select between
Bank <A> and Bank <B> video inputs.
This pin is internally pulled high.
8
B A/V A Unfiltered analog B- or V-channel
IN IN
input for Bank <A>. Sync must be
provided at SYNC IN pin.
R A/Y A Unfiltered analog R- or Y-channel
9
B B/V B Unfiltered analog B- or V-channel
IN
IN
IN
IN
input for Bank <A>. Sync must be
provided at SYNC IN pin.
input for Bank <B>. Sync must be
provided at SYNC IN pin.
3
4
5
GND
Analog ground
10
11
12
13
14
15
B
Analog B or V-channel output
Analog G or U-channel output
5V power supply for output buffers
Analog R or Y-channel output
Analog ground
OUT
V
CC
Analog 5V supply
G
OUT
CCO
OUT
R B/Y B Unfiltered analog R- or Y-channel
IN
V
IN
input for Bank <B>. Sync must be
provided at SYNC IN pin.
R
6
7
G A/U A Unfiltered analog G- or U-channel
IN
GNDO
IN
input for Bank <A>. Sync must be
provided at SYNC IN pin.
DISABLE
Disable/Enable pin. Turns the chip off
when logic high. Internally pulled low.
G B/U B Unfiltered analog G- or U-channel
IN
IN
input for Bank <B>. Sync must be
provided at SYNC IN pin.
16
SYNC IN
Input for an external H-sync logic
signal for filter channels. CMOS
level input. Active High.
2
November, 1999
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
