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ML6420CS-4 参数 Datasheet PDF下载

ML6420CS-4图片预览
型号: ML6420CS-4
PDF下载: 下载PDF文件 查看货源
内容描述: 三/双相位均衡,低通滤波器的视频 [Triple/Dual Phase-Equalized, Low-Pass Video Filter]
分类和应用: 有源滤波器光电二极管信息通信管理LTE
文件页数/大小: 20 页 / 273 K
品牌: MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
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ML6420  
APPLICATION GUIDELINES  
OUTPUT CONSIDERATIONS  
may not be necessary.  
The triple filters have unity or 2X gain. The output circuit  
has unity or 2X gain (0dB) when connected to a 150  
load, and a –6dB gain when driving a 75 load via a 75  
series output resistor. The output may be either AC or DC  
coupled. For AC coupling (Figure 6), the –3dB point  
should be 5Hz or less. There must also be a DC path of  
500 to ground for biasing.  
Since there are three filters in one 16-pin SOIC package,  
space the signal leads away from each other as much  
as possible.  
POWER CONSIDERATIONS  
The ML6420 power dissipation follows the formula:  
2
V  
× 3  
The dual filters have 2X gain. The filter has 2X gain (6dB)  
when connected to a 150 load, and a 0dB gain when  
driving a 75 load via a 75 series output resistor. The  
output may be either AC or DC coupled. For AC coupling,  
the –3dB point should be 5Hz or less. There must also be a  
DC path of 500 to ground for output biasing.  
OUT  
P = I × VCC  
1CC  
6
D
RL  
This is a measure of the amount of current the part sinks  
(current in — current out to the load).  
Under worst case conditions:  
INPUT CONSIDERATIONS  
2
P = 0.175× 5.5 1.5 ꢃ  
× 3 = 872.5mW  
0
5
D
75 ꢅ  
The input resistance is 4k . The input may be either DC or  
AC coupled. (Note that each input sources 80 to 125µA of  
bias current).  
ꢁ ꢄ  
Power consumption can be reduced by not supplingV  
CC  
to unused filter sections. (V A, V B or V C)  
CC  
CC  
CC  
LAYOUT CONSIDERATIONS  
TEST CIRCUITS  
In order to obtain full performance from these triple filters,  
layout is very important. Good high frequency decoupling  
is required between each power supply and ground.  
Otherwise, oscillations and/or excessive crosstalk may  
occur. A ground plane is recommended.  
Figures 6A shows the test circuitn used for measuring the  
frequency and group delay. It is expected that actual  
customer circuits will be much simpler, since board  
bypasses already exist and DC coupling or clamping will  
be utilized at the inputs.  
Each filter has its own supply and ground pins. In the test  
circuit, 0.1µF capacitors are connected in parallel with  
ML6420 VIDEO LOW PASS FILTER  
0.001µF capacitors on pinsV , V A, V B andV C for  
CC CC  
CC  
CC  
maximum noise rejection (Figure 6A and Figure 1G).  
Filter Selection: The ML6420 provides several choices in  
filter cut-off frequencies depending on  
the application.  
Further noise reduction is achieved by using series ferrite  
beads. In typical applications, this degree of bypassing  
7