ML4902
PIN CONFIGURATION
ML4902
20-Pin TSSOP (T20)
D0
D1
D2
D3
RANGE
SHDN
NC
PWR GOOD
VREF
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
PROTECT
VDD
VCC
N DRV H
N DRV L
PWR GND
NC
COMP
ISENSE
VFB
TOP VIEW
PIN DESCRIPTION
PIN
NAME
FUNCTION
PIN
NAME
FUNCTION
1
2
3
4
5
D0
D1
D2
D3
RANGE
LSB input to the DAC which sets the
output voltage
Input to the DAC which sets the
output voltage
Input to the DAC which sets the
output voltage
MSB input to the DAC which sets the
output voltage
Range selection bit for the 2 chord 4-
bit DAC. Logic 1 sets the range at
2.1V to 3.5V with an LSB of 100mV.
Logic 0 sets the range at 1.8V to
2.05V with an LSB of 50mV
Grounding this pin shuts down the
regulator
9
10
11
12
13
15
16
17
18
V
REF
GND
V
FB
I
SENSE
COMP
PWR GND
N DRV L
N DRV H
V
CC
Bypass connection for the internal
3.5V reference
Analog signal ground
Output voltage feedback pin
Current sense input
Connection for the compensation and
optional soft-start delay network
Power ground
Synchronous rectifier driver output
Buck switch driver output
Connection point for monitoring the
5V supply to determine the proper
condition of PWR GOOD
12V power supply input
Connection for the integrating current
limit network
6
8
SHDN
PWR GOOD This open drain output goes low
whenever
SHDN
goes low or when
the output is not within +10% of its
nominal value
19
20
V
DD
PROTECT
2
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
