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ML4890ES-3 参数 Datasheet PDF下载

ML4890ES-3图片预览
型号: ML4890ES-3
PDF下载: 下载PDF文件 查看货源
内容描述: 高效率,低纹波升压稳压器 [High Efficiency, Low Ripple Boost Regulator]
分类和应用: 稳压器开关光电二极管
文件页数/大小: 12 页 / 201 K
品牌: MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
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ML4890  
Also included in the LDO stage is an offset voltage  
FUNCTIONAL DESCRIPTION  
control. This circuit monitors the output current and  
adjusts the offset voltage according the general  
characteristic shown in Figure 3. The offset control  
ensures that the PFM stage provides just enough  
“overhead” voltage for the LDO stage to operate properly.  
The ML4890 combines Pulse Frequency Modulation  
(PFM) and synchronous rectification to create a boost  
converter that is followed by a low dropout linear  
regulator (LDO). This combination creates a low output  
ripple boost converter that is both highly efficient and  
simple to use.  
PFM REGULATOR OPERATION  
When the output of the PFM stage, V  
(pin 5), is at or  
BOOST  
The PFM regulator charges a single inductor for a fixed  
period of time and then completely discharges before  
another cycle begins, simplifying the design by  
eliminating the need for conventional current limiting  
circuitry. Synchronous rectification is accomplished by  
replacing an external Schottky diode with an on-chip  
PMOS device, reducing switching losses and external  
component count.  
above the dropout voltage, V  
+ V , the output of A1  
OUT  
OS  
stays low and the circuit remains idle. When V  
falls  
BOOST  
below the required dropout voltage, the output of A1 goes  
high, signaling the regulator to deliver charge to the  
capacitor C2. Since the output of A2 is normally high, the  
output of the flip-flop becomes SET. This triggers the one  
shot to turn Q1 on and begins charging L1 for 5µs. When  
the one shot times out, Q1 turns off, allowing L1 to  
flyback and momentarily charge C2 through the body  
diode of Q2. But, as the source voltage of Q2 rises above  
the drain, the current sensing amplifier A2 drives the gate  
of Q2 low, causing Q2 to short out the body diode. The  
inductor then discharges into C2 through Q2. The output  
of A2 going low also serves to RESET the flip-flop in  
preparation for the next charging cycle. When the  
The integrated LDO reduces the output ripple voltage to  
less than 5mV peak-to-peak. Integrating the LDO along  
with the PFM regulator allows the circuit to be optimized  
for very high efficiency using a patented feedback  
technique. It also allows the LDO to provide the  
maximum ripple rejection over the operating frequency  
range of the regulator.  
inductor current in Q2 falls to zero, the output of A2 goes  
high, releasing Q2‘s gate, allowing the flip-flop to be SET  
A block diagram of the ML4890 is shown in Figure 2. The  
PFM stage is comprised of Q1, Q2, A1, A2, the one shot,  
the flip-flop, and externals L1 and C2. The LDO stage is  
comprised of Q3, A3, R1, R2, the offset voltage control,  
and external C1. Since the LDO actually controls the  
operation of the PFM regulator, the operation of the LDO  
stage will be covered first.  
again. If the voltage at V  
is still low, A1 will initiate  
BOOST  
another pulse. Typical inductor current and voltage  
waveforms are shown in Figure 4.  
INDUCTOR  
CURRENT  
LDO OPERATION  
The LDO stage operates as a linear regulator. A3 is the  
error amplifier, which compares the output voltage  
through the divider R1 and R2 to the reference, and Q3 is  
the pass device. When the output voltage is lower than  
desired, the output of A3 increases the gate drive of Q3,  
which reduces the voltage drop across it and brings the  
output back into regulation. Similarly, if the output voltage  
is higher than desired, A3 adjusts the gate drive of Q3 for  
more drop and the output is brought back into regulation.  
Q2  
Q2  
ON  
Q(ONE SHOT)  
Q1 ON  
Q1 ON  
ON  
Q1 & Q2 OFF  
Figure 4. PFM Inductor Current Waveforms and Timing.  
SHUTDOWN  
The SHDN pin should be held low for normal operation.  
Raising the voltage on SHDN above the threshold level  
will release the gate of Q3, which effectively becomes an  
open circuit. This also prevents the one shot from  
triggering, which keeps switching from occurring.  
450  
400  
350  
300  
250  
200  
150  
100  
0
10 20 30 40 50 60 70 80 90 100  
(mA)  
I
OUT  
Figure 3. LDO V versus output current.  
OS  
5