ML4890
The DC resistance of the inductor should be kept to a
minimum to reduce losses. A good rule of thumb is to
allow 5 to 10mΩ of resistance for each
µH
of inductance.
Also, be aware that the DC resistance of an inductor
usually isn‘t specified tightly, so an inductor with a
maximum DC resistance spec of 150mΩ may actually
have 100mΩ of resistance.
Suitable inductors can be purchased from the following
suppliers:
Coilcraft
Coiltronics
Dale
Sumida
BOOST CAPACITOR
The boost capacitor (C2) supplies current to the load
during the ON-time of Q1 and will limit the ripple the
LDO stage has to contend with. The ripple on C2 is
influenced by three capacitor parameters: capacitance,
ESL, and ESR. The contribution due to capacitance can be
determined by looking at the change in the capacitor
voltage required to store the energy delivered by the
inductor in a single charge-discharge cycle, as given by
the following formula:
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For example, a 2.4V input, a 22µH inductor, and an
allowance of 100mV of ripple on the boost capacitor
results in a maximum ESR of 200mΩ. Therefore, a boost
capacitor with a capacitance of 22µF or 33µF, an ESR of
less than 200mΩ, and an ESL of less than 5nH is a good
choice. Tantalum capacitors which meet these
requirements can be obtained from the following
suppliers:
AVX
Sprague
OUTPUT CAPACITOR
The LDO stage output capacitor (C1) is required for
stability and to provide a high frequency filter. An output
capacitor with a capacitance of 100µF, an ESR of less than
100mΩ, and an ESL of less than 5nH is a good general
purpose choice.
INPUT CAPACITOR
Unless the input source is a very low impedance battery, it
will be necessary to decouple the input with a capacitor
with a value of between 47µF and 100µF. This provides
the benefits of preventing input ripple from affecting the
ML4890 control circuitry, and it also improves efficiency
by reducing I-squared R losses during the charge and
discharge cycles of the inductor. Again, a low ESR
capacitor (such as tantalum) is recommended.
REFERENCE CAPACITOR
Under some circumstances input ripple cannot be
reduced effectively. This occurs primarily in applications
where inductor currents are high, causing excess output
ripple due to “pulse grouping”, where the charge-
discharge pulses are not evenly spaced in time. In such
cases it may be necessary to decouple the reference pin
(V
REF
) with a small 10nF to 100nF ceramic capacitor. This
is particularly true if the ripple voltage at V
IN
is greater
than 100mV.
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T
ON
×
V
IN
C2
≥
(in Farads)
2
×
L
× ∆
V
BOOST
×
(V
OUT
– V
IN
)
2
2
(3)
For example, a 2.4V input, a 5V output, a 22µH inductor,
and an allowance of 100mV of ripple on the boost
capacitor results in a minimum C2 value of 15µF.
The boost capacitor‘s Equivalent Series Resistance (ESR)
and Equivalent Series Inductance (ESL), also contribute to
the ripple due to the inductor discharge current waveform.
Just after the NMOS transistor turns off, the output current
ramps quickly to match the peak inductor current. This
fast change in current through the boost capacitor‘s ESL
causes a high frequency (5ns) spike that can be over 1V in
magnitude. After the ESL spike settles, the boost voltage
still has a ripple component equal to the inductor
discharge current times the ESR. This component will have
a sawtooth waveshape and can be calculated using the
following formula:
ESR
≤
∆
V
BOOST
(in
Ω
)
I
L(PEAK )
(4)
8
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
