ML4877
FUNCTIONAL DESCRIPTION (Continued)
oscillator frequency versus the value of RT for different
values Of CT. This nomograph may be used to select the
appropriate value of RT and CT to achieve the desired
oscillator frequency for the ML4877.
By selecting the appropriate value the AC lamp current
can be set to slowly increase with a controlled time
constant. The capacitor value can be calculated
according to the following formula.
LINEAR REGULATOR
C = (3 X 10-7)TS
(1)
A linear voltage regulator is provided to power the low
voltage and low current control circuitry on the ML4877.
This is typically used when there is no separate 5V supply
available at the inverter board. For operation up to 18V,
the linear regulator is used by connecting the HVDD pin
to the input battery voltage. For operation over 18V, a
MOSFET, and a resistor (Q and R1, Figure 1) are
connected as shown. The MOSFET is required to stand off
the high voltage. The AZR pin is just a zener diode to
ground used to bias the gate of Q1.
Where TS = Duration of the soft start sequence in seconds
LOGIC CONTROL
The ML4877 is controlled by a single logic input, ON/
OFF. A logic level high on this pin enables the lamp
driver. A logic zero puts the circuit into a very low power
state.
POWER SEQUENCING
LAMP OUT DETECT
It is important to observe correct power and logic input
sequencing when powering up the ML4877. The following
procedure must be observed to avoid damaging the
device.
In those cases when there is no lamp connected, or the
connection is faulty, the output voltage of the lamp driver
circuit will tend to rise to a high level in an attempt to
start the nonexistent lamp. The lamp out detect circuit on
the ML4877 will detect this condition by sensing a
voltage proportional to the center tap voltage on the
primary of the output transformer, T1 on the L RTD pin.
The ration of resistors R7 and R8 sets the lamp out detect
threshold. When the voltage on the L RTD pin exceeds
VDD, an internal latch is set and the lamp driver goes
into a shutdown mode. The logic control pin ON/OFF
must be cycled low, then high to reset the latch and
return the lamp driver to the normal state. The input to the
lamp out latch is inhibited by the signal on the soft start
pin. The latch will not be set until the voltage on SS CAP
(pin 3) rises to more than 4.2V nominally.
1. Apply the battery power to HVDD, or
2. If HVDD is not used. Apply the VDD voltage. With
HVDD connected the VDD voltage is supplied by the
internal regulator on the ML4877.
3. Apply a logic high to the ON/OFF input.
Please refer to Application Note 32 for detailed
application information beyond what is presented here.
APPLICATIONS SECTION
SOFT START
HIGH POWER INVERTER
The capability to control the start up behavior is achieved
by setting the value of a single capacitor, C2 in Figure 1.
The ML4877 is easily adapted to high power CCFL
inverter designs. Figure 5 displays a schematic of a 30W
ML4877 application. This particular design employs PWM
dimming in order to extend dimming range.
1000
The 30W inverter design is ideal for applications between
the 20W and 30W range. Deep dimming capability is
achieved via PWM technique with no flicker and no pop-
on effects. Uniform intensity can be maintained across 1
to 8 lamps to well below 5%.
C = 30pF
100
Figure 6 provides a top view of an example of a ML4877
30W design. This design can be modified for 1 to 8 lamps
and contains a PWM dimming interface using standard
low cost components.
For the latest application notes and other information,
visit the Micro Linear website at www.microlinear.com.
10
10
100
1000
RESISTANCE (kΩ)
Figure 4. Oscillator Frequency Nomograph
8
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
