ML4875
INPUT CAPACITOR
LAYOUT
Unless the input source is a very low impedance battery,
it will be necessary to decouple the input with a capacitor
with a value of between 47µF and 100µF. This provides
the benefits of preventing input ripple from affecting the
ML4875 control circuitry, and it also improves efficiency
by reducing I-squared R losses during the charge and
discharge cycles of the inductor. Again, a low ESR
capacitor (such as tantalum) is recommended.
Good PC board layout practices will ensure the proper
operation of the ML4875. Important layout considerations
include:
• Use adequate ground and power traces or planes
• Keep components as close as possible to the ML4875
• Use short trace lengths from the inductor to the V pin
L
and from the output capacitor to the V
pin
OUT
DRIVING THE SHDN INPUT
• Use a single point ground for the ML4875 ground pins,
and the input and output capacitors
Unlike other boost regulators which use external Schottky
diodes, the ML4875 has the ability to isolate the load from
the battery input when the SHDN pin is high. Since there
may be no other voltage available when the regulator is in
shutdown, the SHDN input threshold is set well below the
minimum V voltage. SHDN can be driven directly from
IN
an open collector device with a high value pull-up resistor
to V . If SHDN is driven from a TTL or CMOS output
IN
device, a resistor divider should be used to prevent the
SHDN input high level from exceeding V , and to ensure
IN
the SHDN input low level is below the 200mV threshold.
SETTING THE RESET THRESHOLD
To use the RESET comparator as an input voltage monitor,
it is necessary to use an external resistor divider tied to the
DETECT pin as shown in the block diagram. The resistor
values R and R can be calculated using the following
A
B
equation:
(R +R )
A
B
V
= 0.2 ×
(5)
IN(MIN)
R
B
The value of R should be 100ký or less to minimize bias
B
current errors. R is then found by rearranging the
A
equation:
V
IN(MIN)
R
= R ×
−1
A
B
(6)
0.2
8