ML4851
DESIGN CONSIDERATIONS (Continued)
V
R = R × ꢀ
ꢃ
IN(MIN)
−1
ꢂ
ꢅ
A
B
(6)
TOP LAYER
BOTTOM LAYER
ꢁ
ꢄ
0.2
LAYOUT
Good PC board layout practices will ensure the proper
operation of the ML4851. Important layout considerations
include:
n Use adequate ground and power traces or planes
n Keep components as close as possible to the ML4851
n Use short trace lengths from the inductor to the V pin
L
and from the output capacitor to the V
pin
OUT
n Use a single point ground for the ML4851 PWR GND
pin and the input and output capacitors, and connect
GND to PWR GND with a separate trace
A sample PC board layout is shown in Figure 6.
Figure 6. Sample PC Board Layout
ML4851-3
ML4851-5
VIN
IOUT (mA)
EFFICIENCYPERCENTAGE
VIN
IOUT (mA)
EFFICIENCYPERCENTAGE
L = 10µH
1.0
L = 10µH
1.0
45.8
108.3
184.1
77.6
77.7
77.9
24.2
68.0
123.1
78.3
79.9
80.3
1.5
2.0
1.5
2.0
L = 18µH
1.0
L = 18µH
1.0
30.1
70.9
125.5
185.7
243.4
82.5
83.5
83.9
84.5
85.4
15.7
43.3
80.4
125.3
169.9
236.9
82.3
84.8
85.7
86.2
86.5
87.0
1.5
2.0
2.5
3.0
1.5
2.0
2.5
3.0
L = 33µH
1.0
3.5
17.6
42.7
76.1
120.4
159.6
86.0
87.8
88.7
89.7
90.7
L = 33µH
1.0
1.5
2.0
2.5
3.0
9.1
24.8
47.4
74.5
106.9
147.5
190.0
227.8
83.5
87.0
88.6
89.5
90.3
90.8
91.4
92.1
1.5
2.0
2.5
3.0
3.5
4.0
4.5
L = 56µH
1.0
10.6
25.9
47.6
75.8
108.0
85.2
89.1
90.8
92.0
93.1
1.5
2.0
2.5
3.0
L = 56µH
1.0
5.5
13.9
28.5
45.7
67.1
92.5
122.1
149.6
80.1
85.9
88.9
90.3
91.4
92.3
92.6
93.8
1.5
2.0
2.5
3.0
3.5
4.0
4.5
Table 1. Maximum Output Current and Efficiency vs. V
IN
July, 2000
DATASHEET
8
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
