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ML4824IP-2 参数 Datasheet PDF下载

ML4824IP-2图片预览
型号: ML4824IP-2
PDF下载: 下载PDF文件 查看货源
内容描述: 功率因数校正和PWM控制器组合 [Power Factor Correction and PWM Controller Combo]
分类和应用: 功率因数校正光电二极管控制器
文件页数/大小: 16 页 / 267 K
品牌: MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
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ML4824  
FUNCTIONAL DESCRIPTION (Continued)  
open-loop crossover frequency should be 1/2 that of the  
line frequency, or 23Hz for a 47Hz line (lowest  
The deadtime of the oscillator may be determined using:  
anticipated international power frequency). The gain vs.  
input voltage of the ML4824s voltage error amplifier has a  
specially shaped nonlinearity such that under steady-state  
operating conditions the transconductance of the error  
amplifier is at a local minimum. Rapid perturbations in  
line or load conditions will cause the input to the voltage  
2.5V  
tDEADTIME  
=
´ C T = 490 ´ CT  
(4)  
(5)  
5.1mA  
The deadtime is so small (t  
operating frequency can typically be approximated by:  
>> t  
) that the  
RAMP  
DEADTIME  
1
error amplifier (V ) to deviate from its 2.5V (nominal)  
FB  
fOSC  
=
value. If this happens, the transconductance of the voltage  
error amplifier will increase significantly, as shown in the  
Typical Performance Characteristics. This raises the gain-  
bandwidth product of the voltage loop, resulting in a  
much more rapid voltage loop response to such  
perturbations than would occur with a conventional linear  
gain characteristic.  
tRAMP  
EXAMPLE:  
For the application circuit shown in the data sheet, with  
the oscillator running at:  
1
fOSC = 100kHz =  
tRAMP  
The current amplifier compensation is similar to that of  
the voltage error amplifier with the exception of the  
choice of crossover frequency. The crossover frequency of  
the current amplifier should be at least 10 times that of  
the voltage amplifier, to prevent interaction with the  
voltage loop. It should also be limited to less than 1/6th  
that of the switching frequency, e.g. 16.7kHz for a  
100kHz switching frequency.  
tRAMP = CT ´ RT ´ 0.51= 1´ 10-5  
-4  
Solving for R x C yields 2 x 10 . Selecting standard  
T
T
components values, C = 470pF, and R = 41.2k.  
T
T
The deadtime of the oscillator adds to the Maximum PWM  
Duty Cycle (it is an input to the Duty Cycle Limiter). With  
zero oscillator deadtime, the Maximum PWM Duty Cycle  
is typically 45%. In many applications, care should be  
There is a modest degree of gain contouring applied to the  
transfer characteristic of the current error amplifier, to  
increase its speed of response to current-loop  
taken that C not be made so large as to extend the  
T
Maximum Duty Cycle beyond 50%. This can be  
perturbations. However, the boost inductor will usually be  
the dominant factor in overall current loop response.  
Therefore, this contouring is significantly less marked than  
that of the voltage error amplifier. This is illustrated in the  
Typical Performance Characteristics.  
accomplished by using a stable 470pF capacitor for C .  
T
PWM SECTION  
Pulse Width Modulator  
For more information on compensating the current and  
voltage control loops, see Application Notes 33 and 34.  
Application Note 16 also contains valuable information for  
the design of this class of PFC.  
The PWM section of the ML4824 is straightforward, but  
there are several points which should be noted. Foremost  
among these is its inherent synchronization to the PFC  
section of the device, from which it also derives its basic  
timing (at the PFC frequency in the ML4824-1, and at  
twice the PFC frequency in the ML4824-2). The PWM is  
capable of current-mode or voltage mode operation. In  
current-mode applications, the PWM ramp (RAMP 2) is  
usually derived directly from a current sensing resistor or  
current transformer in the primary of the output stage, and  
is thereby representative of the current flowing in the  
Oscillator (RAMP 1)  
The oscillator frequency is determined by the values of R  
T
and C , which determine the ramp and off-time of the  
T
oscillator output clock:  
1
converters output stage. DC I , which provides cycle-  
LIMIT  
fOSC  
=
(2)  
(3)  
by-cycle current limiting, is typically connected to RAMP  
2 in such applications. For voltage-mode operation or  
certain specialized applications, RAMP 2 can be  
connected to a separate RC timing network to generate a  
voltage ramp against which VDC will be compared. Under  
these conditions, the use of voltage feedforward from the  
PFC buss can assist in line regulation accuracy and  
tRAMP + tDEADTIME  
The deadtime of the oscillator is derived from the  
following equation:  
F V - 1.25I  
REF  
´ InGV - 3.75J  
tRAMP = CT ´ RT  
H
K
REF  
response. As in current mode operation, the DC I  
LIMIT  
at V  
= 7.5V:  
input is used for output stage overcurrent protection.  
REF  
tRAMP = CT ´ RT ´ 0.51  
9