ML4824
PIN CONFIGURATION
ML4824
16-Pin PDIP (P16)
16-Pin Wide SOIC (S16W)
IEAO
1
2
3
4
5
6
7
8
16 VEAO
I
15
14
13
V
V
V
AC
FB
I
SENSE
REF
CC
V
RMS
SS
12 PFC OUT
11 PWM OUT
10 GND
V
DC
RAMP 1
RAMP 2
9
DC I
LIMIT
TOP VIEW
PIN DESCRIPTION
PIN NAME
FUNCTION
PIN NAME
FUNCTION
1
IEAO
PFC transconductance current error
amplifier output
9
DC I
PWM current limit comparator input
LIMIT
10
11
12
13
GND
Ground
2
3
I
PFC gain control reference input
AC
PWM OUT PWM driver output
PFC OUT PFC driver output
I
Current sense input to the PFC current
limit comparator
SENSE
4
5
V
Input for PFC RMS line voltage
compensation
V
CC
Positive supply (connected to an
internal shunt regulator)
RMS
SS
Connection point for the PWM soft start
capacitor
14
15
16
V
REF
Buffered output for the internal 7.5V
reference
6
7
V
PWM voltage feedback input
V
FB
PFC transconductance voltage error
amplifier input
DC
RAMP 1
RAMP 2
Oscillator timing node; timing set
by R C
VEAO
PFC transconductance voltage error
amplifier output
T
T
8
When in current mode, this pin
functions as as the current sense input;
when in voltage mode, it is the PWM
input from PFC output (feed forward
ramp).
2
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
