ML4819
SLOPE COMPENSATION
Slope compensation is accomplished by adding 1/2 of the
current flowing out of pin 12 to pin 1 (for the PFC section
and pin 9 (for the PWM section). The amount of slope
compensation is equal to (I
RAMP COMP
/2)
¥
R
L
where R
L
is
the impedance to GND on pin 1 or pin 9. Since most of
the PWM applications will be limited to 50% duty cycle,
slope compensation should not be needed for the PWM
section. This can be defeated by using a low impedance
load to the current sense on pin 9.
10
20
R
T
C
T
V
REF
I
R(SC)
Q1
RAMP COMP
12
R
SC
I
R(SC)
"
2
SLOPE
COMPENSATION
9V
I
R(SC)
"
2
TO PIN 9
I
CC,
SUPPLY CURRENT (mA)
40
ENABLE
V
REF
V
REF
GEN.
9V
–
+
INTERNAL
BIAS
V
CC
5V V
REF
OSC
Figure 9. Under-Voltage Lockout Block Diagram
TO PIN 1
30
20
Figure 7. Slope Compensation Circuit
10
T
A
= 25 C
0
500
MULTIPLIER OUTPUT CURRENT (µA)
4.5V
4.0V
3.5V
3.0V
300
E/A OUTPUT VOLTAGE (V)
400
0
10
20
V
CC,
SUPPLY VOLTAGE (V)
30
40
Figure 10a. Total Supply Current vs. Supply Voltage
200
2.5V
100
2.0V
1. 5V
0
100
200
300
SINE INPUT CURRENT (µA)
400
500
0
35
30
Figure 8. Gain Modulator Linearity
ICC — SUPPLY CURRENT
25
20
15
10
5
UNDER VOLTAGE LOCKOUT
On power-up the ML4819 remains in the UVLO condition;
output low and quiescent current low. The IC becomes
operational when V
CC
reaches 16V. When V
CC
drops
below 10V, the UVLO condition is imposed. During the
UVLO condition, the 5V V
REF
pin is “off”, making it
usable as a status flag.
OPERATING
CURRENT
START-UP
0
0
10
20
30
40
50
60
70
TEMPERATURE ( C)
Figure 10b. Supply Current (I
CC
) vs. Temperature
7