ML4804
PIN CONFIGURATION
ML4804
16-Pin PDIP (P16)
16-Pin Narrow SOIC (S16N)
IEAO
1
2
3
4
5
6
7
8
16 VEAO
I
15
14
13
V
V
V
AC
FB
I
SENSE
REF
CC
V
RMS
SS
12 PFC OUT
11 PWM OUT
10 GND
V
DC
RAMP 1
RAMP 2
9
DC I
LIMIT
TOP VIEW
PIN DESCRIPTION
PIN NAME
FUNCTION
PIN
NAME
FUNCTION
1
2
3
4
5
IEAO
Slew rate enhanced PFC
transconductance error amplifier output
9
DC I
PWM cycle-by-cycle current
limit comparator input
LIMIT
I
AC
PFC AC line reference input to Gain
Modulator
10
GND
Ground
11
12
13
14
PWM OUT
PFC OUT
PWM driver output
PFC driver output
Positive supply
I
Current sense input to the PFC Gain
Modulator
SENSE
V
RMS
PFC Gain Modulator RMS line voltage
compensation input
V
CC
V
V
Buffered output for the internal
7.5V reference
REF
SS
Connection point for the PWM soft start
capacitor
15
16
PFC transconductance voltage
error amplifier input
FB
6
7
V
DC
PWM voltage feedback input
RAMP 1
RAMP 2
Oscillator timing node; timing set
VEAO
PFC transconductance voltage
error amplifier output
by R C
T
T
8
When in current mode, this pin
functions as the current sense input;
when in voltage mode, it is the PWM
modulation ramp input.
2
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
