ML4802
PIN CONFIGURATION
ML4802
16-Pin PDIP (P16)
16-Pin Narrow SOIC (S16N)
IEAO
IAC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VEAO
VFB
ISENSE
VRMS
SS
VREF
VCC
PFC OUT
PWM OUT
GND
VDC
RT/CT
RAMP 1
RAMP 2
TOP VIEW
PIN DESCRIPTION
PIN NAME
FUNCTION
PIN NAME
FUNCTION
1
2
3
IEAO
IAC
PFC current error amplifier output
PFC gain control reference input
9
RAMP 2
PWM current feedback/overcurrent
limit input
10
11
12
13
14
GND
Ground
ISENSE
Current sense input to the PFC current
limit comparator
PWM OUT PWM driver output
4
5
VRMS
SS
Input for PFC RMS line voltage
compensation
PFC OUT
VCC
PFC driver output
Positive supply input
Connection point for the PWM soft start
capacitor
VREF
Buffered output for the internal 7.5V
reference
6
7
VDC
PWM feedback voltage input
15
16
VFB
PFC voltage error amplifier input
PFC voltage error amplifier output
RT/CT
Connection for master (PWM) oscillator
frequency setting components
VEAO
8
RAMP 1
PFC ramp input
Datasheet August 2000
2