ML4664/ML4669
PIN DESCRIPTION (Pin Number in Parentheses is for TQFP Version)
PIN
NAME
FUNCTION
PIN
NAME
FUNCTION
1(29)
C
A capacitor from this pin to V
determines the Link Monitor response
time.
7(4)
8(5)
TxCAP0 An external capacitor of 680pF is
TxCAP1 tied between these two pins to set
the pulse width for the pre-
TIMER
CC
equalization on the twisted pair
2(30) LTF
Link Test Fail. Active high. Normally
this pin is low, indicating that the link
is operational. If the link goes down
resulting from the absence of link
pulses or frames being received, the
chip will go into the Link Test Fail
state and bring LTF high.
transmitter. If these two pins are
shorted together, no pre- equalization
occurs. If the ML4664/ML4669 is
driving only a short cable, or board
traces, these pins may be shorted.
9(6)
20(18)
GND
Ground reference
When the ML4664 is in the link test
fail state, the optical and twisted pair
transmitters are disabled from sending
data. However, the optical transmitter
does send an idle signal, and link
pulses are sent at the twisted pair
transmitter. When the ML4669 is in
link test fail state, the optical and
twisted pair transmitters are disabled
from sending data. Also, the optical
transmitter will not send an idle
signal. However, link pulses may be
sent at the twisted pair transmitter,
depending on the optical inputs. See
Table 1.
10(7) TPOUTN Pre-equalized differential balanced
11(8) TPOUTP current driven output. These outputs
are connected to a balanced transmit
output filter which drives the twisted
pair cable through pulse transformers.
The output current is set with an
external resistor connected to RTSET
allowing the chip to drive 100W
unshielded , 150W shielded twisted
pair cables or a range of other
characteristic impedances.
12(10) POLDIS Receive Polarity status. Active low
LED Driver, open collector output.
Indicates the polarity of the receive
twisted pair regardless of auto polarity
correction. When low, receive polarity
is reversed. When high, receive
This pin may be grounded to disable
Link Test. In this mode no link pulses
are sent and the link will not fail if no
link pulses are received. If this pin is
not used as an LED driver, and is not
grounded, a 2kW 5% resistor should
be connected between this pin and
polarity is correct. This pin may be
grounded to disable the polarity
circuit. If this pin is not used as an
LED driver, and is not grounded, a
2kW, 5% resistor should be connected
V
CC
.
between this pin and V
.
CC
3(31) TPLED
Indicates that reception is taking place
on the TPINP, TPINN pair. Active low
LED driver, open collector. It is
13(11) RTSETTP When using 100W unshielded twisted
pair, a 220W resistor is tied between
extended 16ms for visibility.
this pin and V . When using 150W
CC
Optionally, this pin may be grounded
to disable the optical output. If this
pin is not used as an LED driver and is
not grounded, a 2kW, 5% resistor
should be connected between TPLED
shielded twisted pair, a 330W resistor
is tied between this pin and V
.
CC
15(13) RRSET
A 1% 61.9kW resistor tied from this
pin to V is used for internal biasing.
CC
and V
.
CC
16(14) RTSETOP Sets the current driven output of the
4(32) TPINP
Twisted Pair receive data input.
When this signal exceeds the
receive squelch requirements the
receive data is buffered and sent
to the Rx± outputs.
transmitter. A 115W resistor should be
5(1)
TPINN
tied between this pin and V
.
CC
6(3)
14(12)
V
CC
5V input
3