ML4663
Since the amplifier has a differential input, two capacitors
of equal value are required. If the signal driving the input
is single ended, one of the coupling capacitors can be tied
The V
pin is used to adjust the sensitivity of the
THADJ
receiver. The ML4663 is capable of exceeding the
10BASE-FL specifications for sensitivity. The sensitivity is
dependent on the layout of the PC board. A good low
noise layout will exceed the 10BASE-FL specifications,
while a poor layout will fail to meet the sensitivity and
BER spec.
to AV (Figure 1).
CC
The internal amplifier has a lowpass filter built-in to band
limit the input signal which in turn will improve the signal
to noise ratio.
The threshold generator shifts the reference voltage at
Although the input is AC coupled, the offset voltage within
the amplifier will be present at the amplifier’s output. This
V
through a circuit which has a temperature
THADJ
coefficient matching that of the limiting amplifier. The
is represented by V in Figure 4. In order to reduce this
OS
relationship between the V
peak input threshold) is:
and the V (the peak to
THADJ
TH
error a DC feedback loop is incorporated. This negative
feedback loop nulls the offset voltage, forcing V to be
OS
zero. Although the capacitor on V is non-critical, the
V
THADJ
= 408V
(2)
DC
TH
pole it creates can effect the stability of the feedback loop.
To avoid stability problems, the value of this capacitor
should be at least 10 times larger than the input coupling
capacitors.
–10
In a 10BASE-FL receiver there must be less than 1 x 10
bit errors at a receive power level of –32.5dBm average.
One procedure to determine the sensitivity of a receiver is
to start at the lowest optical power level and gradually
increase the optical power until the BER is met. In this
case the Link Detect circuit must not disable the receiver
VOUT
+
(i.e. V
should be tied to Ground). Once the
THADJ
VOS
sensitivity of the receiver is determined, V
can be set
THADJ
just above the power level that meets the BER
VOUT
–
specification. This way the receiver will shut-off before the
BER is exceeded.
For 10BASE-FL V
However if greater sensitivity is required the circuit in
figure 5 can be used to adjust the V voltage. Even if
can be tied directly to V
.
REF
Figure 4.
THADJ
The comparator is a high-speed, differential zero crossing
detector that slices and accurately digitizes the receive
signal. The output of the comparator is fed in parallel into
both the receive squelch circuit and the loopback MUX.
THADJ
V
is tied to V
, it is a good idea to layout a board
REF
THADJ
with these two resistors available. This will allow potential
future adjustments without board revisions.
LINK DETECT CIRCUIT AND LOW LIGHT
The response time of the Link Detect circuit is set by the
TIMER
C
pin. Starting from the link off state the link can be
The link detect circuit monitors the input signal and
determines when the input falls below a preset voltage
level. When the input falls below a preset voltage, the
ML4663 goes into the Low Light state. In the Low Light
state the transmitter is disabled, but continues sending the
1MHz idle signal, the loopback is disabled, the receiver is
disabled, and the LMON LED pin goes to high shutting off
the LMON LED. To return to the Link Pass state, the
optical receiver power must be 20% higher than the shut-
off state. This built-in hysteresis adds stability to the Link
Monitor circuit. Once the receiver power threshold is
exceeded, the ML4663 waits 250ms to 750ms, then
checks to see that Tx+. Tx– is idle and no data is being
received before re-enabling the transmitter, receiver,
loopback circuit, and lighting up the LMON LED.
switched on if the input exceeds the set threshold for a
time given by:
C
× 0.7V
700µA
TIMER
=
T
(3)
To switch the link from on to off, the above time will be
doubled. A value of 0.05µF will meet to 10BASE-FL
specifications.
VREF
REF
R1
VTHADJ
THRESH
GEN
R2
Figure 5.
10
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
