ML4621
FUNCTIONAL DESCRIPTION
AMPLIFIER
The quantizer has a two stage limiting amplifier with an
input common mode range of (GND + 1.8V) to (V
CC
–
1.5V). Maximum sensitivity is achieved through the use
of a DC restoration feedback loop and AC coupling on
the input. The input DC bias voltage is set by an on-chip
network at about 1.9V when it is AC coupled. These
coupling capacitors, in conjunction with the input
impedance of the amplifier, establish a highpass filter
with a 3dB corner frequency, f
L
, at:
1
f
L
=
2
π
¥
8000
¥
C
the stability of the feedback loop. The value of this
capacitor should be at least 100 times smaller than the
input coupling capacitors to avoid stability problems
using the ML4621.
The output of the ML4621 amplifier is isolated from the
comparator and made available to the user. This allows
the user to add circuitry between the amplifier and the
comparator for wave shaping and other signal
conditioning.
COMPARATOR
Two types of comparators are employed in the output
section of these quantizers. The high speed ECL
comparator is used to provide the ECL level outputs, and
in turn drives the TTL comparator. The enable pin,
CMP
ENABLE,
is provided to control the ECL comparator.
When
CMP ENABLE
is low the comparators function
normally. When it is high it forces ECL+ high, ECL– low,
and TTL OUT high. The
CMP ENABLE
pin can be
controlled with TTL level signals when the quantizer is
powered by 5V and ground.
LINK MONITOR
This function is implemented by the minimum signal
discriminator and the threshold generator circuits. The
purpose of this function is to monitor the input signal and
provide a status signal indicating when the input falls
below a preset voltage level. This is done by peak
detecting the output of the amplifier section and
comparing this level with the voltage at V
TH
ADJ.
(1)
Two capacitors of equal value are required since the
amplifier has a differential input. One of the coupling
capacitors can be tied to V
CC
as shown in Figure 1 if the
signal driving the input is single ended. The high corner
frequency can also be adjusted by attaching capacitors to
CF1 and CF2. The equation for adjusting this corner is:
f
H
=
1
2
π
¥
425
¥
C
(2)
The offset voltage within the amplifier will be present at
the amplifier’s output even though the input is AC
coupled. This is represented by V
OS
in Figure 2. In order
to reduce this error a DC feedback loop is incorporated.
This negative feedback loop nulls the offset voltage,
forcing V
OS
to be zero. An external capacitor at V
DC
is
used to store the offset voltage. Although the value of
this capacitor is noncritical, the pole it creates can affect
470Ω
5V
4
NC
5V
3
CMP ENABLE
2
TTL LINK MON
1 28 27 26
ECL LINK MON
VCC
INOM
ISET
0.1µF
0.5µF
5
6
7
8
9
10
18pF
18pF
0.001µF
11
VIN–
VIN+
NC
VDC
CF2
CF1
NC
CPEAK
VREF
VTH ADJ
GND
TTL OUT
GND TTL
25
24
23
22
21
20
19
0.1µF
ML4621
VOUT–
VOUT+
CMP+
CMP–
ECL+
ECL–
NC
VCC TTL
12 13 14 15 16 17 18
Figure 1. ML4621 Configured for 20MHz Bandwidth with TTL Output
6
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
