欢迎访问ic37.com |
会员登录 免费注册
发布采购

ML4621CP 参数 Datasheet PDF下载

ML4621CP图片预览
型号: ML4621CP
PDF下载: 下载PDF文件 查看货源
内容描述: 数据量化 [Data Quantizer]
分类和应用:
文件页数/大小: 8 页 / 164 K
品牌: MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
 浏览型号ML4621CP的Datasheet PDF文件第1页浏览型号ML4621CP的Datasheet PDF文件第2页浏览型号ML4621CP的Datasheet PDF文件第4页浏览型号ML4621CP的Datasheet PDF文件第5页浏览型号ML4621CP的Datasheet PDF文件第6页浏览型号ML4621CP的Datasheet PDF文件第7页浏览型号ML4621CP的Datasheet PDF文件第8页  
ML4621
PIN DESCRIPTION
PIN
NAME
(Pin Number in Parenthesis is for DIP Version)
PIN
NAME
FUNCTION
FUNCTION
1 (1)
ECL LINK MON
ECL link monitor output. Signal
is low when the V
IN
+ and V
IN
inputs exceed the minimum
threshold set by a voltage on
V
TH
ADJ. Signal is high when
input signal level is below that
threshold.
TTL LINK MON
TTL link monitor output. Same
logic function as the
ECL LINK
MON.
Capable of driving a
10mA LED indicator. This pin is
normally tied to
CMP ENABLE.
CMP ENABLE
Low voltage at this TTL input
enables both the ECL and TTL
outputs. A high TTL voltage
disables the comparator output
with ECL+ high, ECL– low, and
TTL OUT high.
This input should be capacitively
coupled to the input source or to
ground. (Input resistance is
approximately 8kΩ).
This input should be capacitively
coupled to the input source or to
ground. (Input resistance is
approximately 8kΩ).
An external capacitor on this pin
integrates an error signal which
nulls the offset of the input
amplifier. If the DC feedback
loop is not being used, this pin
should be connected to V
REF
.
A capacitor from this pin to
ground controls the maximum
bandwidth of the amplifier to
accommodate lower operating
frequencies.
The capacitor on this pin should
match the one on CF2.
Negative output of the amplifier,
which is normally tied to CMP–.
Positive output of the amplifier,
which is normally tied to CMP+.
Comparator input pin. Open base
configuration relies on the DC
bias of the amp output to set
proper DC operating voltage.
Reestablish voltage if filtering is
used between V
OUT
+ and CMP+.
14(12) CMP–
Comparator input pin. Open base
configuration relies on the DC
bias of the amp output to set the
proper DC operating voltage.
Reestablish voltage if filtering is
used between V
OUT
– and CMP–.
ECL comparator negative output.
ECL comparator positive outout.
Negative supply for the TTL
comparator stage. If the TTL
output is not necessary, connect
GND TTL and V
CC
TTL to V
CC
.
Positive supply for the TTL
comparator stage. If the TTL
output is not necessary, connect
GND TTL and V
CC
TTL to V
CC
.
TTL data output (totem pole type
output stage).
Negative supply. Connect to –
5.2V for ECL operation, or to
source ground for TTL operation.
This input sets the minimum
amplitude of the input signal
required to cause the link
monitors to go low.
A 2.5V reference with respect to
GND.
A capacitor from this pin to GND
determines the link monitor
response time.
Current into an internal diode
connected between this pin and
GND is turned around and pulled
from C
PEAK
. This pin is normally
connected to I
NOM
.
Sets a current of approximately
125µA when connected to I
SET
.
Positive supply. Connect to
source ground for ECL operation,
or to 5V for TTL operation.
16(13) ECL–
17(14) ECL+
18(15) GND TTL
2 (2)
3 (3)
19(16) V
CC
TTL
5 (4)
V
IN
20(17) TTL OUT
21(18) GND
6 (5)
V
IN
+
22(19) V
TH
ADJ
8 (6)
VDC
23(20) V
REF
24(21) C
PEAK
9 (7)
CF2
26(22) I
SET
10 (8) CF1
11 (9) V
OUT
-
12 (10) V
OUT
+
13 (11) CMP+
27(23) I
NOM
28(24) V
CC
3