ML4428
The simplified impedance of the loop filter is
3000
2500
2000
(s + ω
C s (s + ω
)
1
LEAD
Z
RC
(s) =
)
LAG
1
CVCO = 82nF
CVCO = 164nF
Where the lead and lag frequencies are set by:
1
RC
ω
=
LEAD
1500
1000
500
0
2
C + C
1
2
ω
=
LAG
RC C
1
2
Requiring the loop to settle in 20 PLL cycles with
w
= 10 ¥ w
1
produces the following calculations
LAG
LEAD
2
for R, C and C :
0
2
4
6
8
10
12
−4
7.508 ×10 × Atten×K
VVCO (VOLTS)
e
C =
1
N
Figure 3. VCO Output Frequency vs. V
(Pin 20)
VCO
C = 9 ¥ C
2
1
Figure 4 shows the linearized transfer function of the
Phase Locked Loop with the phase detector formed from
the sampled phase through the Gm amplifier with the
4
8.89 ×10
Atten×K ×RPM
R =
e
MAX
loop filtered formed by R, C , and C . The Phase detector
1
2
gain is:
where K is the back-EMF constant in volts per radian per
e
second, and RPM
is the rotor speed. See Micro Linear
MAX
× 2.3 ×10−4A /Radian
Ke × ω × Atten
2π
application note 35 for derivation of the above formulas.
The 80k resistor to GND from the RC pin assists in a
VCO
Where Ke is the motor back-E.M.F. constant in V/Radian/
sec, w is the rotor speed in r/s, and Atten is the back-
E.M.F. resistive attenuator, nominally 0.3.
smooth transition from sense mode to closed loop
operation.
I
MOTOR
~200µs
DRIVE ~100ms
t
SENSE ~3ms
I
LOOP CLOSED HERE
(RUN MODE)
MOTOR
t
SENSE
DRIVE
SENSE
DRIVE
SENSE
DRIVE
DRIVE
Figure 5. Typical Sensed Start-up
9