ML2722
VCC2
13
15
VTUNE
I
VCO Tuning Voltage input from the PLL
loop filter. This pin is very sensitive to
noise coupling and leakage currents.
1.25V
VTUNE
15
3.7k
8
VSS
26
28
VBG
O
O
Internal Bandgap Reference Voltage.
Decoupled to ground with a 220nF
capacitor.
RSSI/TPI
Buffered Analog RSSI output with a
nominal sensitivity of 35mV/dB. An RF
input signal range of –95 to –20 dBm
gives an RSSI voltage output of zero to
2.7 V.
TPI
MUX
VCC5
24
RSSI
RSSI
MUX
RSSI/TPI
28
OP
AMP
100Ω
8
VSS
SERIAL BUS SIGNALS
4
EN
I (CMOS)
Enable pin for the three-wire serial
control bus that sets the operating
frequency and programmable options.
The control registers are loaded on a
low-to-high transition of the signal. Serial
control bus data is ignored when this
signal is high. This is a CMOS input, and
the thresholds are referenced to VDD
and VSS.
VDD
31
EN
4
5.5k
1.7p
DATA
5
6
5
6
DATA
CLK
I (CMOS)
I (CMOS)
Serial Control Bus Data. 16-bit words,
which include programming data and the
two-bit address of a control register. This
is a CMOS input, and the thresholds are
referenced to VDD and VSS.
CLK
8
VSS
Serial control bus data is clocked in on
the rising edge when EN is low. This is a
CMOS input; the thresholds are
referenced to VDD and VSS.
DS2722-F-06
FINAL DATASHEET
DECEMBER 2005 12