PRELIMINARY
PIN DESCRIPTIONS (CONTINUED)
Pin #
45
31
Signal Name
MS1
MS2
I/O Type
MODE SELECT
MODE SELECT
Description
CONTROL (continued)
ML2713
37
RECEIVE
8
17
MS3
CMO
RSSI
MODE SELECT
O (CMOS)
O(ANLG)
Auto filter alignment disable. Tie to VCC4 to disable the on-chip filter
alignment. Tie to ground for normal operation
Receive A/D converter disable. Tie MS2 to VCC2 to disable the on-chip
comparator and D/A converter in the receive mode. The D/A will still
be enabled in the transmit mode. Tie to ground for normal operation
Test mode control pin. Tie this pin to ground at all times
Comparator output. Active in receive mode, this CMOS output that is
referenced to VCC1 and has a nominal drive capability of 10mA
Receive Signal Strength Indicator. This output has a nominal 1Volt
range. The RSSI voltage decreases with increasing received signal
level. The RSSI output has a 10k source impedance. It is referred to
VCC2
DC time constant restore control. This input controls whether VDC is in
the hold or acquire mode. A high on this pin puts VDC in the acquire
mode, low puts VDC in the hold mode. This CMOS input is referred to
VCC1
Six data inputs to Digital to Analog Converter. Inputs are not latched.
DD5 is the most significant bit (MSB).
DD4
DD3
DD2
DD1
DD0 is the least significant bit (LSB)
2LO input. These pins are connected to a differential input stage that is
connected in a common base configuration. A pull-down resistor with a
nominal value of 4k is required on each pin to bias this input. The pull
down resistors are included on the ML2712 and do not need to be added
if that chip is used. The nominal differential input impedance is 200W
Receive 1IF input and transmit 2IF output. These pins are bi-directional
I/O are connected to the receive input amplifier and transmit output
amplifier. These pins have a nominal differential impedance of 340W
set by on-chip resistances
Transmit regulator output. This output of the on-chip regulator is
enabled in transmit mode. The nominal output voltage of the regulator
is 2.8V and drives current up to 25mA. The pin requires a de-coupling
capacitor with a nominal value 100nF
46
SLICE
I(CMOS)
RECEIVE AND TRANSMIT
47
DD5
I (CMOS)
1
2
3
4
5
22
23
DD4
DD3
DD2
DD1
DD0
2LO
2LOB
I
I
I
I
I
(CMOS)
(CMOS)
(CMOS)
(CMOS)
(CMOS)
I(ANLG)
26
27
1IF
1IFB
I/O(ANLG)
TRANSMIT
32
REG
O (ANLG)
FILTERS - RECEIVE
35
34
DPS
DPSB
ANLG
Discriminator phase shift. These pins connect to the external
discriminator phase shift filter. These pins have a nominal differential
impedance of 600W set by on-chip resistors
January, 2000
PRELIMINARY DATASHEET
5
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
