ML2340, ML2350
Bipolar Output Voltage Mode
ML2350
Gain
GAIN 1
GAIN 0
GAIN
Voltage OutputP-P
VREF = 2.50V with
VCC - 7.0V
VREF = 5.0V with
VCC • 8.0V
1
0
0
1
1
0
1
0
1
/
/
4
VREF IN ¥ 1/
VREF IN ¥ 1/
VREF IN ¥ 1/
8
4
2
Setting Unipolar
Bipolar
Unipolar
Bipolar
1
2
1
/
4
0 to 0.625V –0.3125V to 0 to 1.25V –0.625V to
+0.3125V +0.625V
1
2
VREF IN ¥ 1
1
/
2
0 to 1.250V –0.6250V to 0 to 2.50V –1.250V to
+0.6250V +1.250V
The output buffer can source or sink as much as 10mA of
current with an output voltage of at least 1V from either
1
2
0 to 2.500V –1.2500V to 0 to 5.00V –2.500V to
+1.2500V +2.500V
V
or AGND. As the output voltage approaches V or
CC
CC
0 to 5.000V –2.5000V to 0 to 10.00V –5.000V to
+2.5000V +5.000V
AGND the current sourcing/sinking capability of the
output buffer is reduced. The output buffer can still swing
down to within 10mV of AGND and up to within 40mV of
V
with a 100kW load at V
to AGND in the unipolar
CC
OUT
An external reference can alternatively be used on V
REF IN
operation. In the bipolar operation, the output buffer
swing is limited to about 100mV from either rails.
to set the desired full scale voltage. The linearity of the D/A
converter depends on the reference used, however. To
insure integral linearity at an 8-bit level, a reference
voltage of no less than 2V and no more than 7V (2.75V
for operation with a low-voltage power supply) should
be used.
1.5 VOLTAGE REFERENCE
A bandgap voltage reference is incorporated on the ML2340
and ML2350. Two reference voltages can be produced by
each device. An internal comparator monitors the power
supply voltage to determine the selection of the reference
voltage. A reference voltage of 2.25 volts on the ML2340
and 2.50 volts on the ML2350 is selected when the supply
voltage is less than approximately 7.50 volts. Otherwise, a
reference voltage of 4.50 volts and 5.00 volts is selected. To
prevent the comparator from oscillating between the two
selections, avoid operation with a power supply between 70
and 8.0 volts.
1.6 DIGITAL INTERFACE
The digital interface of the ML2340 and ML2350 consist
of a transfer input (XFER) and eight data inputs, DB0
through DB7. The digital interface operates in one of the
two modes:
1.6.1 Single-Buffered Mode
Digital input data on DB0–DB7 is passed through an 8-bit
transparent input latch on the rising edge of XFER.
Because the outputs of the latch are connected directly to
the inputs of the internal DAC, changes on the digital data
while the XFER input is still active will cause an
immediate change in the DAC output voltage. To hold the
input data on the latch, the XFER input needs deactivated
while the data is still stable.
The bandgap reference is trimmed for zero Temperature
Coefficient (TC) at 35°C to minimize output voltage drift
over the specified operating temperature range.
The internal reference is buffered for use by the DAC and
external circuits. The reference buffer will source more
than 5mA of current and sink more than 1mA of current.
With V
connected to V
, the following output
REF IN
REF OUT
voltage ranges of the DAC are obtained:
1.6.2 Flow-Through Mode
ML2340
In the flow-through mode, the input latch is bypassed.
When XFER is set to logic “1”, a change of data inputs,
DB0–DB7, results in an immediate update of the output
voltage.
VREF = 2.25V with
VCC - 7.0V
VREF = 4.5V with
VCC • 8.0V
Gain
Setting Unipolar
Bipolar
Unipolar Bipolar
1.7 POWER-ON-RESET
1
/
4
0 to 0.562V –0.281V to 0 to 1.125V –0.562V to
+0.281V +0.562V
The ML2340 and ML2350 have an internal power-on-
reset circuit to initialize the device when power is first
applied to the device. The power-on-reset interval of
typically 8µs begins when the supply voltage, V reaches
approximately 2.0V. During the power-on-reset interval,
the transparent latch is reset to all “0’s”.
1
/
2
0 to 1.125V –0.562V to 0 to 2.250V –1.125V to
+0.562V +1.125V
CC
1
2
0 to 2.250V –1.125V to 0 to 4.500V –2.250V to
+1.125V +2.250V
0 to 4.500V –2.250V to 0 to 9.000V –4.500V to
+2.250V +4.500V
8
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
