ML2281, ML2282, ML2284, ML2288
ML2281 Timing
1
2
t
3
4
5
6
7
8
9
10
11
CLOCK (CLK)
SET-UP
CHIP SELECT (CS)
t
C
DATA OUT (DO)
SAMPLE & HOLD
*
HI-Z
HI-Z
7
6
5
4
3
2
1
0
(MSB)
(LSB)
ACQUISITION (t
)
ACQ
*LSB FIRST OUTPUT NOT AVAILABLE ON ML2281
ML2282 Timing
1
2
t
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
CLOCK (CLK)
CHIP SELECT (CS)
DATA IN (DI)
OUTPUT DATA
SET-UP
ADDRESS MUX
START
BIT
ODD/
SIGN
DON’T CARE (DI DISABLED UNTIL NEXT CONVERSION CYCLE)
MSB FIRST DATA LSB FIRST DATA
SGL/DIF
DATA OUT (DO)
HI-Z
HI-Z
7
6
5
4
3
2
1
0
1
2
3
4
5
6
7
SAMPLE & HOLD
(MSB)
(LSB)
(MSB)
ACQUISITION (t
)
ACQ
ML2284 Timing
1
2
t
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
CLOCK (CLK)
OUTPUT DATA
SET-UP
CHIP SELECT (CS)
DATA IN (DI)
ADDRESS MUX
START
BIT
ODD/SIGN
DON’T CARE (DI DISABLED UNTIL NEXT CONVERSION CYCLE)
SGL/DIF SELECT
A/D CONVERSION IN PROCESS
BIT 1
SAR STATUS (SARS)
HI-Z
HI-Z
HI-Z
MSB FIRST DATA
LSB FIRST DATA
DATA OUT (DO)
HI-Z
7
6
5
4
3
2
1
0
1
2
3
4
5
6
7
SAMPLE & HOLD
ACQUISITION (t
(MSB)
(LSB)
(MSB)
)
ACQ
Figure 2. Timing Diagrams (Continued)
8