ML2280, ML2283
13
2
DI*
CS
D
C
R
R
R
R
R
5-BIT SHIFT-REGISTER
CS
ODD/
SIGN
START SGL/DIF
SELECT 1
SELECT 0
START
16
CLK
MUX
ADDRESS
V
CC
CS
SARS*
11
3
4
5
6
+
CH0*
CH1
Σ
T
CS
x
–
C
R
TIME
DELAY
Q
D
D
Q
DSTART 2
ANALOG
MUX
(EQUIVALENT)
+
–
DSTART 1
C
R
CS
DEOC
CH2*
CH3*
D
Q
C
C
R
CS
CS
CS
V
CC
C
COMP
EOC
10
DO
CS
B7
R
Q
R
R
C
C
9
B6
B5
V
REF/2
D
14
R
TO INTERNAL
CIRCUITRY
SAR
LOGIC
AND
9-BIT
SHIFT
V
CC
B4
B3
B2
B1
LADDER
AND
DECODER
REGISTER
INPUT
V
1
8
CC
V+*
13
LATCH
TO
INTERNAL
CIRCUITS
16
17
18
7V SHUNT
REGULATOR
DGND*
B0
EOC
COMP
INPUT PROTECTION—ALL LOGIC INPUTS
AGND*
LSB FIRST
MSB FIRST
PARALLEL XFR
TO SHIFT REGISTER
* SOME OF THESE FUNCTIONS/PINS ARE NOT AVAILABLE WITH ML2280.
Figure 6. ML2288 Functional Block Diagram
9
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
