ML2280, ML2283
PIN CONFIGURATION
ML2280
Single Differential Input
8-Pin PDIP
CS
V
IN
+
V
IN
–
GND
1
2
3
4
8
7
6
5
ML2280
Single Differential Input
8-Pin SOIC
CS
V
IN
+
V
IN
–
GND
1
2
3
4
8
7
6
5
ML2283
4-Channel MUX
14-Pin PDIP
V+
CS
CH0
CH1
CH2
CH3
DGND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
V
CC
CLK
DO
V
REF/2
V
CC
CLK
DO
V
REF/2
V
CC
DI
CLK
SARS
DO
V
REF/2
AGND
TOP VIEW
TOP VIEW
TOP VIEW
PIN DESCRIPTION
NAME
FUNCTION
NAME
FUNCTION
V
CC
DGND
AGND
GND
Positive supply. 5V ± 10%
Digital ground. 0 volts. All digital inputs and
outputs are referenced to this point.
Analog ground. The negative reference voltage
for A/D converter.
Combined analog and digital ground.
SARS
Successive approximation register status.
Digital output which indicates that a
conversion is in progress. When SARS goes
to 1, the sampling window is closed and
conversion begins. When SARS goes to 0,
conversion is completed. When
CS
= 1, SARS
is in high impedance state.
Clock. Digital input which clocks data in on
DI on rising edges and out on DO on falling
edges. Also used to generate clocks for A/D
conversion.
Data input. Digital input which contains serial
data to program the MUX and channel
assignments.
Chip select. Selects the chip for multiplexer
and channel assignment and A/D conversion.
When
CS
= 1, all digital outputs are in high
impedance state. When
CS
= 0, normal A/D
conversion takes place.
CH0,
Analog inputs. Digitally selected to be single
V
IN
+, V
IN
– ended (V
IN
) or; V
IN
+ or V
IN
– of a differential
input. Analog range = GND - V
IN
- V
CC
.
V
REF/2
Reference. The analog input range is twice the
positive reference voltage value applied to this
pin.
Input to the Shunt Regulator.
Data out. Digital output which contains result
of A/D conversion. The serial data is clocked
out on falling edges of CLK.
CLK
DI
V+
DO
CS
2
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
