ML2280, ML2283
ML2280 Timing
1
CLOCK (CLK)
t
SET-UP
CHIP SELECT (CS)
t
C
DATA OUT (DO)
SAMPLE & HOLD
ACQUISITION (t
ACQ
)
HI-Z
7
(MSB)
6
5
4
3
2
1
0
(LSB)
*
HI-Z
2
3
4
5
6
7
8
9
10
11
*LSB FIRST OUTPUT NOT AVAILABLE ON ML2280
ML2283 Timing
1
CLOCK (CLK)
tSET-UP
CHIP SELECT (CS)
ADDRESS MUX
START
BIT
DATA IN (DI)
SGL/DIF
SAR STATUS (SARS)
SELECT
BIT 1
ODD/SIGN
SELECT
BIT 0
DON’T CARE (DI DISABLED UNTIL NEXT CONVERSION
A/D CONVERSION IN PROCESS
HI-Z
MSB FIRST DATA
DATA OUT (DO)
HI-Z
SAMPLE & HOLD
ACQUISITION (tACQ)
7
6
(MSB)
5
4
3
2
1
0
1
2
3
4
5
6
7
LSB FIRST DATA
HI-Z
OUTPUT DATA
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
HI-Z
Figure 2. Timing Diagrams (Continued)
7