ML2036
FUNCTIONAL DESCRIPTION
The ML2035 is composed of a programmable frequency
generator, a sine wave generator, a crystal oscillator, and a
serial digital interface. The ML2036 frequency and sine
wave generator functional block diagram is shown in
Figure 4.
The ML2036 has a V
input that can be tied to V or
REF CC
generated from an external voltage. With the GAIN input
equal to a logic "1", the sine wave peak-to-peak voltage is
equal to ±V ; with the GAIN equal to a logic "0", the
REF
peak voltage is ±V /2. However, the overall output
REF
voltage swing is limited to no closer than 1.5V to either
PROGRAMMABLE FREQUENCY GENERATOR
rail. This means that to avoid clipping, V
can only be
REF
tied to V when GAIN is a logic "0". The sinewave output
CC
The programmable frequency generator produces a digital
output whose frequency is determined by a 16-bit digital
word.
is referenced to AGND.
The analog section is designed to operate over a range
from DC to 50kHz. Due to slew rate limitations, the peak-
to-peak output voltage must be limited toV
The frequency generator is composed of a phase
£
OUT(P-P)
accumulator which is clocked at f
/4. The value
(125kV x Hz)/f
. For example, an output at 50kHz must
P-P OUT
CLK IN
OUT
stored in the data latch is added to the phase accumulator
every 4 cycles of CLK IN. The frequency of the analog
output is equal to the rate at which the accumulator
overflows and is given by the equation:
be limited to 2.5V .V
can drive a 1kW, 100pF load
and swing to within 1.5V ofV and V , provided the
slew rate limitations mentioned above are not exceeded.
CC
SS
The output offset voltage, V , is a function of the peak-to-
peak output voltage and is specified as:
OS
fCLKIN × D15−D0
0
5DEC
fOUT
=
(1)
223
2.5+ V
ꢀ
OUT P−P ꢃ
0 5 ꢂ
0 5ꢅ
(3)
VOS MAX = ±
The frequency resolution and the minimum frequency are
the same and is given by the following equation:
100
ꢁ
ꢄ
For example, if V
= 2.5V:
OUT(P-P)
fCLKIN
∆fMIN
When f
=
(2)
= 1.5Hz (±0.75Hz).
MIN
223
2.5+ 2.5
= ±ꢀ ꢃ = ±50mV
VOS MAX
ꢂ ꢅ
0 5
ꢁ ꢄ
100
= 12.352MHz, Df
CLK IN
Lower frequencies are obtained by using a lower input
clock frequency.
CRYSTAL OSCILLATOR
The crystal oscillator generates an accurate reference
clock for the programmable frequency generator. The
internal clock can be generated with a crystal or external
clock.
Due to the phase quantization nature of the frequency
generator, spurious tones can be present in the output
range of –55dB relative to fundamental. The energy from
these tones is included in the signal to noise + distortion
specification. The frequency of these tones can be very
close to the fundamental. Therefore, it is not practical to
filter them out.
If a crystal is used, it must be placed between CLK IN and
DGND of the ML2036. An on-chip crystal oscillator will
then generate the internal clock. No other external
capacitors or components are required. The crystal should
be a parallel-resonant type with a frequency between
3MHz to 12.4MHz. It should be placed physically as close
as possible to the CLK IN and DGND.
SINE WAVE GENERATOR
The sine wave generator is composed of a sine look-up
table, a DAC, and an output smoothing filter. The sine
look-up table is addressed by the phase accumulator. The
DAC is driven by the output of the look-up table and
generates a staircase representation of a sine wave.
An external clock can drive CLK IN directly if desired. The
frequency of this clock can be anywhere between 0 and
12MHz.
The output filter smoothes the analog output by removing
the high frequency sampling components. The resultant
voltage on V
is a sinusoid with the second and third
OUT
harmonic distortion components at least 45dB below the
fundamental.
SCK
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SID
LATI
Figure 5. Serial Interface Timing.
7
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
