欢迎访问ic37.com |
会员登录 免费注册
发布采购

MIC3003GFL 参数 Datasheet PDF下载

MIC3003GFL图片预览
型号: MIC3003GFL
PDF下载: 下载PDF文件 查看货源
内容描述: FOM管理IC,具有内部校准 [FOM Management IC with Internal Calibration]
分类和应用:
文件页数/大小: 74 页 / 747 K
品牌: MICREL [ MICREL SEMICONDUCTOR ]
 浏览型号MIC3003GFL的Datasheet PDF文件第4页浏览型号MIC3003GFL的Datasheet PDF文件第5页浏览型号MIC3003GFL的Datasheet PDF文件第6页浏览型号MIC3003GFL的Datasheet PDF文件第7页浏览型号MIC3003GFL的Datasheet PDF文件第9页浏览型号MIC3003GFL的Datasheet PDF文件第10页浏览型号MIC3003GFL的Datasheet PDF文件第11页浏览型号MIC3003GFL的Datasheet PDF文件第12页  
Micrel, Inc.
MIC3003GFL
Pin Configuration
24-Pin MLF
®
(ML)
Pin Description (MIC3003GFL only)
Pin Number
1
2
3
4
5
Pin Name
VDDD
QGPO
GNDD
RS0
VIN/INT
Pin Function
Power supply input for digital functions.
Open-drain output. Can be selected (via OEMCFG3 bit 7) to be an open-drain GPO or an active-
low, open-drain, pulsed reset signal output controlled by the status of bits [0-2] of byte A2h: FFh.
Ground return for digital functions.
Digital input. Receiver Rate Select input. OR’ed with soft rate select bit SRS0 to determine the
state of the RRSOUT pin. The state of this pin is always reflected in the RS0S bit.
If bit 4 (IE) in the USRCTL register is set to 0 (its default value), this pin is configured as an analog
input. If IE bit is set to 1, this pin is configured as an open-drain output.
Analog input: Multiplexed A/D input for monitoring supply voltage, with a 0V to 5.5V input range.
Open-drain output: outputs the internally generated active-low interrupt signal /INT.
6
7
8
9
CLK
DATA
TXDISABLE
TXFAULT
Digital input. Serial clock input.
Digital I/O, open-drain, bi-directional serial data input/output.
Digital input; Active high. The transmitter is disabled when this input is high or the STXDIS bit is
set to 1. The state of this input is always reflected in the TXDIS bit.
Digital Output; Open-Drain, with programmable polarity. If OEMCFG5 bit 4 is set to 0, a high level
indicates a hardware fault impeding transmitter operation. If OEMCFG5 bit 4 is set to 1, a low level
indicates a hardware fault impeding transmitter operation. The state of this pin is always reflected
in the TXFLT bit.
Digital Input; Transmitter Rate Select Input; OR’ed with soft rate select bit SRS1 to determine the
state of the TRSOUT pin. The state of this pin is always reflected in the RS1S bit.
Analog Input. Multiplexed A/D converter input for monitoring received optical power. The input
range is 0 to V
REF
. A 5-bit programmable EEPOT on this pin provides coarse calibration and
ranging of the RX power measurement.
10
11
RS1
VRX
July 2010
8
M9999-072910-A
hbwhelp@micrel.com
or (408) 955-1690