Micrel, Inc.
SW
MIC2810
Input Capacitor
The switch (SW) pin connects directly to the inductor
and provides the switching current necessary to operate
in PWM mode. Due to the high speed switching on this
pin, the switch node should be routed away from
sensitive nodes.
A minimum 1µF ceramic, 4.7µF recommended, should
be placed as close as possible to the VIN pin for optimal
bypassing. X5R or X7R dielectrics are recommended for
the input capacitor. Y5V dielectrics lose most of their
capacitance over temperature and are therefore, not
recommended. A minimum 1µF is recommended close
to the VIN and PGND pins for high frequency filtering.
Smaller case size capacitors are recommended due to
their lower ESR and ESL. Please refer to the PCB layout
section for an example of an appropriate circuit layout.
PGND
Power ground (PGND) is the ground path for the high
current PWM mode. The current loop for the power
ground should be as small as possible.
Inductor Selection
SGND
The MIC2810 is designed for use with a 2.2µH inductor.
Proper selection should ensure the inductor can handle
the maximum average and peak currents required by the
load. Maximum current ratings of the inductor are
generally given in two methods; permissible DC current
and saturation current. Permissible DC current can be
rated either for a 40°C temperature rise or a 10% to 20%
loss in inductance. Ensure that the inductor selected can
handle the maximum operating current. When saturation
current is specified, make sure that there is enough
margin that the peak current will not saturate the
inductor. Peak inductor current can be calculated as
follows:
Signal ground (SGND) is the ground path for the biasing
and control circuitry. The current loop for the signal
ground should be as small as possible.
CSET
The CSET pin is a current source output that charges a
capacitor that sets the delay time for the power-on reset
output from low to high. The delay for POR high to low
(detecting an undervoltage on any of the outputs) is
always minimal. The current source of 1.25µA charges a
capacitor up from 0V. When the capacitor reaches
1.25V, the output of the POR is allowed to go high. The
delay time in microseconds is equal to the Cset in
picofarads.
⎛
⎞
VOUT
⎜
⎟
⎟
VOUT 1−
POR Delay (µs) = CSET (pF)
⎜
V
IN
⎝
⎠
IPK = IOUT
+
2× f ×L
Component Selection
Output Capacitor
IPK:
IOUT
VIN:
Peak Inductor Current
Output/Load Current
Input Voltage
:
LDO1 and LDO2 outputs require a 2.2µF ceramic output
capacitor for stability. The DC/DC switch mode regulator
also requires a 2.2µF ceramic output capacitor to be
stable. All output capacitor values can be increased to
improve transient response, but performance has been
optimized for a 2.2µF ceramic on the LDOs and the
DC/DC regulator. X7R/X5R dielectric-type ceramic
capacitors are recommended because of their
temperature performance. X5R/X7R-type capacitors
change capacitance by 15% over their operating
temperature range and are the most stable type of
ceramic capacitors. Z5U and Y5V dielectric capacitors
change value by as much as 50% to 60% respectively
over their operating temperature ranges.
VOUT
f:
:
Output Voltage
Switching Frequency of PWM Regulator
Inductor Value
L:
M9999-041107-B
April 2007
14
MICREL [ MICREL SEMICONDUCTOR ]
