MIC280
Configuration Locking
The security register, LOCK, provides the ability to disable
configuration changes as they apply to the MIC280’s most
critical functions: shutdown mode, and reporting diode faults
and over-temperature events. LOCK provides a way to prevent
malicious or accidental changes to the MIC280 registers that
might prevent a system from responding properly to critical
events. Once L0, L1, or L2 has been set, the global interrupt
enable bit, IE, will be set and fixed. It cannot subsequently be
cleared. Its state will be reflected in the configuration register.
The bits in LOCK can only be set once. That is, once a bit is
set, it cannot be reset until the MIC280 is power-cycled or a
warm reset is performed by setting RST in the configuration
register. The warm reset function can be disabled by setting
L4 in LOCK. If L4 is set, locked settings cannot be changed
during operation and warm resets cannot be performed; only
a power-cycle will reset the locked state(s).
If L0 is set, the values of IM0 and CRIT0 become fixed and
unchangeable. That is, writes to CRIT0 and the corresponding
interrupt enable bit are locked out. A local over-temperature
event will generate an interrupt regardless of the setting of
IE or its interrupt mask bit.
If L1 is set, the values of IM1 and CRIT1 become fixed and
unchangeable. A remote over-temperature event will gener-
ate an interrupt regardless of the setting of IE or its interrupt
LOCK BIT
L0
L1
L2
L3
L4
FUNCTION LOCKED
Local over-temperature detection
Remote over-temperature detection
Diode fault interrupts locked on or off
Shutdown mode
Warm resets
Micrel
mask bit. Similarly, setting L2 will fix the state of IM2, allow-
ing the system to permanently enable or disable diode fault
interrupts. A diode fault will generate an interrupt regardless
of the setting of IE or its interrupt mask bit.
L3 can be used to lock out shutdown mode. If L3 is set, the
MIC280 will not shut down under any circumstances. Attempts
to set the SHDN bit will be ignored and all chip functions will
remain operational. If L3 is set while the MIC280 is in shutdown
mode, it will immediately exit shutdown mode and resume
normal operation. It will not be possible to subsequently re-
enter shutdown mode.
Setting L4 disables the RST bit in the configuration register,
preventing the host from initiating a warm reset. Writes to
RST will be completely ignored if L4 is set.
RESPONSE WHEN SET
IM0 fixed at 1, writes to CRIT0 locked-out; IE permanently set
IM1 fixed at 1; writes to CRIT1 locked-out; IE permanently set
IM2 fixed at current state; IE permanently set if IM2=1
SHDN fixed at 0; exit shutdown if SHDN=1 when L3 is set
RST bit disabled; cannot initiate Warm resets
Table 7: Lock bit functionality
MIC280
12
November 2004
MICREL [ MICREL SEMICONDUCTOR ]
