MIC2563A
Micrel
A
VPP
Enable
0
B
C
D
E
F
G
H
J
K
VPP to 3.3V
VPP to 12V
VPP to 3.3V
VPP
OFF
VPP to 5V
VPP to 12V
VPP to 5V
VPP OFF
VPP to 12V
VPP OFF
t13
t10
t7
t9
t8
t6
t16
12V
VPP
Output
t1
t3
t2
t4
t11
t5
t15
t12
5V
t14
3.3V
0
Figure 1. MIC2563A V
PP
Timing Diagram
V
PP
Enable is shown generically: refer to “MIC2563A-0 and MIC2563A-1 Control Logic Tables.” At time “A,” V
PP
= 3.3V is
selected. At “B,” V
PP
is set to 12V. At “C,” V
PP
= 3.3V (from 12V). At “D,” V
PP
is disabled. At “E,” V
PP
is programmed to 5V.
At “F,” V
PP
is set to 12V. At “G,” V
PP
is programmed to 5V. At “H,” V
PP
is disabled. At “J,” V
PP
is set to 12V. And at “K,” V
PP
is again disabled. R
L
= 100Ω for all measurements. Load capacitance is negligible.
A
VCC
Enable
0
B
C
D
VCC to 3.3V
VCC OFF
VCC to 5V
VCC OFF
t1
t2
t4
t8
t6
5V
t3
t7
t5
3.3V
VCC
Output
0
Figure 2. MIC2563A V
CC
Timing Diagram
V
CC
Enable is shown generically: refer to “MIC2563A-0 and MIC2563A-1 Control Logic Tables” for specific control logic input.
At time “A,” V
CC
is programmed to 3.3V. At “B,” V
CC
is disabled. At “C,” V
CC
is programmed to 5V. And at “D,” V
CC
is disabled.
R
L
= 10Ω.
March 2004
5
M9999-033004