MIC2564A
Micrel
Output Timing Diagrams
A
V
PP
Enable
0
V
PP
to 3.3V V
PP
to 12V
V
PP
to 3.3V V
PP
OFF
t
9
V
PP
to 5V
V
PP
to 12V
V
PP
to 5V
V
PP
OFF
B
C
D
E
F
G
H
J
K
V
PP
to 12V
V
PP
OFF
t
13
t
7
12V
t
8
t
10
t
6
t
16
V
PP
OUT
t
1
t
4
t
14
5V
3.3V
t
11
t
2
t
5
t
15
t
12
t
3
0
FLAG
Figure 2. V
PP
Timing Diagram
V
PP
Enable is shown generically. R
L
= 100Ω. C
L
= negligible. Refer to the serial control timing diagrams for details.
At time
A)
V
PP
= 3.3V is selected,
B)
V
PP
is set to 12V,
C)
V
PP
= 3.3V (from 12V),
D)
V
PP
is disabled,
E)
V
PP
is programmed
to 5V,
F)
V
PP
is set to 12V,
G)
V
PP
is programmed to 5V,
H)
V
PP
is disabled,
J)
V
PP
is set to 12V,
K)
V
PP
is again disabled.
A
V
CC
Enable
0
B
C
D
V
CC
to 3.3V
t
17
t
19
V
CC
OFF
t
23
t
21
V
CC
to 5V
t
18
t
20
V
CC
OFF
t
24
t
22
5V
V
CC
3.3V
OUT
0
FLAG
0
Figure 3. V
CC
Timing Diagram
V
CC
Enable is shown generically. R
L
= 10Ω. Refer to the serial control timing diagrams for specific control logic input.
At time
A)
V
CC
is programmed to 3.3V,
B)
V
CC
is disabled,
C)
V
CC
is programmed to 5V,
D)
V
CC
is disabled.
MIC2564A
6
September 1999
MICREL [ MICREL SEMICONDUCTOR ]
