MIC2563A
A
VCC
Enable
0
Micrel
B
C
D
VCC to 3.3V
VCC OFF
VCC to 5V
VCC OFF
t1
t2
t4
t8
t6
5V
t3
t7
t5
3.3V
VCC
Output
0
Figure 2. MIC2563A V
CC
Timing Diagram. V
CC
Enable is shown generically: refer to the timing tables (below) for
specific control logic input. At time A, V
CC
is programmed to 3.3V. At B, V
CC
is disabled. At C, V
CC
is programmed
to 5V. And at D, V
CC
is disabled. R
L
= 10
Ω
MIC2563A-0 Control Logic Table
V
CC5_EN
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
V
CC3_EN
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
EN1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
EN0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
V
CC OUT
Clamped to Ground
Clamped to Ground
Clamped to Ground
Clamped to Ground
3.3
3.3
3.3
3.3
5
5
5
5
3.3
3.3
3.3
3.3
V
PP OUT
High Z
High Z
High Z
Clamped to Ground
High Z
3.3
12
Clamped to Ground
High Z
5
12
Clamped to Ground
High Z
3.3
5
Clamped to Ground
2-52
1997
MICREL [ MICREL SEMICONDUCTOR ]
