Micrel, Inc.
MIC2555
Serial Controller
Register Map
REGISTER
NAME
ADDRESS ACCESS
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
00
01
02
03
04
05
06
07
R
R
R
x8D
x05
Vendor ID
Product ID
xB0 see Note 1
x55 see Note 1
R
Control
Register 1
Control
R/S
R/C
R/S
R/C
uart_io
uart_en
oe_int_en bdis_acon_en
test bit
dat_se0
suspend
speed
dm_pull-
down
dp_pull-
down
dm_pull-
up
dp_pull-
up
vbus_chrg vbus_dischrg
vbus_drv
id_float
id_gnd_out
se_dm
Register 2
Interrupt
Source
bdis_acon
cr_int
08
R
id_gnd_in
se_dp
sess_vld
vbus_vld
(sess_end)
Undefined
09
Interrupt
Latch
Interrupt
Mask False
0A
0B
0C
0D
0E
R/S
R/C
R/S
R/C
R/S
bdis_acon
cr_int
id_float
id_float
id_float
se_dm
se_dm
se_dm
id_gnd_in
id_gnd_in
id_gnd_in
se_dp
se_dp
se_dp
sess_vld
sess_vld
sess_vld
vbus_vld
vbus_vld
vbus_vld
(sess_end)
bdis_acon
(sess_end)
cr_int
bdis_acon
(sess_end)
Interrupt
Mask True
cr_int
0F
10
R/C
Undefined
11
12
13
14
R/S
R/C
R/S
Control
Register 3
scl_en
0
rcs_dis
0
ext_osc
0
sess_end_en
0
cr_int_sel
0
id_det_off
GPIO_2
cp_off
pwr_dn
GPIO
Output
Enable
GPIO_1
GPIO_0
15
R/C
16
17
18
19
1A
1B
1C
1D
1E
1F
R/S
R/C
R
GPIO
Output
0
0
0
0
0
0
0
0
0
0
GPIO_2
GPIO_2
GPIO_1
GPIO_1
GPIO_00
GPIO_0
GPIO Input
Undefined
R/S
R/C
R/S
R/C
R/S
R/C
GPIO
Interrupt
scl_en
rcs_dis
ext_osc
sess_end_en
cr_int_sel
id_det_off
GPIO_2
GPIO_2
cp_off
GPIO_1
GPIO_1
pwr_dn
GPIO_0
GPIO_0
GPIO
Mask False
0
0
0
0
0
0
0
0
0
0
GPIO
Mask True
Notes:
1. These values will change with chip revision level and are assigned by Micrel at the time of manufacture.
2. All bits reset to zero, except those listed in WHITE, which reset to one.
3. Register bits not listed are undefined.
4. The upper five bits of the GPIO registers always read zero.
M9999-060805
(408) 955-1690
June 2005
20
MICREL [ MICREL SEMICONDUCTOR ]
