MIC2505/2506
Micrel
Electrical Characteristics
VIN = +5V; GATE = open; TA = 25°C, bold indicates –40°C ≤ TA ≤ +85°C; unless noted
Parameter
Condition
Min
Typ
Max
Units
Supply Current
MIC2505-1
MIC2506
V
CTL = logic 0, OUT = open
0.75
110
5
160
µA
µA
VCTL = logic 1, OUT = open
MIC2505-2
VCTL = logic 0, OUT = open
VCTL = logic 1, OUT = open
110
0.75
160
5
µA
µA
Control Input Voltage
Control Input Current
V
CTL = logic 0 → logic 1 transition
2.1
1.9
2.4
V
V
VCTL = logic 1 → logic 0 transition
0.8
VCTL = logic 0
0.01
0.01
1
1
µA
µA
VCTL = logic 1
Control Input Capacitance
Output MOSFET Resistance
1
pF
MIC2505 series
MIC2506
V
IN = 5V, TA = 25°C
VIN = 5V, –40°C < TA < +85°C
IN = 3.3V, TA = 25°C
30
50
60
60
75
mΩ
mΩ
mΩ
mΩ
V
35
VIN = 3.3V, –40°C < TA < +85°C
VIN = 5V, TA = 25°C
75
80
125
150
135
165
mΩ
mΩ
mΩ
mΩ
VIN = 5V, –40°C < TA < +85°C
VIN = 3.3V, TA = 25°C
VIN = 3.3V, –40°C < TA < +85°C
Output Turn-On Delay
Output Turn-On Rise Time
Output Turnoff Delay
MIC2505 series RL = 10Ω, CGATE = 0
MIC2506 RL = 10Ω each output
MIC2505 series RL = 10Ω, CGATE = 0
MIC2506 RL = 10Ω each output
MIC2505 series RL = 10Ω, CGATE = 0
MIC2506 RL = 10Ω each output
MIC2505 series RL = 10Ω, CGATE = 0
200
100
500
200
850
700
3000
2000
0.7
2000
2000
7500
6000
20
µs
µs
µs
µs
µs
µs
µs
µs
µA
A
0.8
20
Output Turnoff Fall Time
1.5
20
MIC2506
RL = 10Ω each output
0.7
20
Output Leakage Current
Current Limit Threshold
10
MIC2505 series
MIC2506
2
1
4
2
1
3
A
Open Load Threshold, Note 1
VCTL = logic low, Note 2
0.5
1.5
V
Overtemperature Shutdown
Threshold
TJ increasing
TJ decreasing
135
125
°C
°C
Error Flag Output Resistance
V
IN = 5V, IL = 10mA
10
15
25
40
Ω
Ω
VIN = 3.3V, IL = 10mA
Error Flag Off Current
UVLO Threshold
VFLAG = 5V
0.01
1
µA
VIN = increasing
2.2
2.0
2.5
2.3
2.7
2.5
V
V
VIN = decreasing
General Note: Devices are ESD protected, however, handling precautions recommended.
General Note: All limits guaranteed by testing or statistical analysis.
Note 1: MIC2505-1 and -2 versions have no open load detect feature.
Note 2: Open-load threshold is the output voltage (V
) where FLG becomes active (low) when CTL is low. OUT is pulled high by a 100k external
OUT
resistor to V
.
IN
MIC2505/2506
4
April 1998