LMC7101
Micrel
0
.
011V
=
8
.
8
≈
9
Ω
0
.
001245A
Driving Capacitive Loads
R
OUT
=
Driving a capacitive load introduces phase-lag into the output
signal, and this in turn reduces op-amp system phase margin.
The application that is least forgiving of reduced phase
margin is a unity gain amplifier. The LMC7101 can typically
drive a 100pF capacitive load connected directly to the output
when configured as a unity-gain amplifier.
Using Large-Value Feedback Resistors
A large-value feedback resistor (> 500kΩ) can reduce the
phase margin of a system. This occurs when the feedback
resistor acts in conjunction with input capacitance to create
phase lag in the fedback signal. Input capacitance is usually
a combination of input circuit components and other parasitic
capacitance, such as amplifier input capacitance and stray
printed circuit board capacitance.
Figure 2 illustrates a method of compensating phase lag
caused by using a large-value feedback resistor. Feedback
capacitor C
FB
introduces sufficient phase lead to overcome
the phase lag caused by feedback resistor R
FB
and input
capacitance C
IN
. The value of C
FB
is determined by first
estimating C
IN
and then applying the following formula:
Application Information
Input Common-Mode Voltage
Some amplifiers exhibit undesirable or unpredictable perfor-
mance when the inputs are driven beyond the common-mode
voltage range, for example, phase inversion of the output
signal. The LMC7101 tolerates input overdrive by at least
200mV beyond either rail without producing phase inversion.
If the absolute maximum input voltage (700mV beyond either
rail) is exceeded, the input current should be limited to
±5mA
maximum to prevent reducing reliability. A 10kΩ series input
resistor, used as a current limiter, will protect the input
structure from voltages as large as 50V above the supply or
below ground. See Figure 1.
R
IN
V
IN
10kΩ
V
OUT
Figure 1. Input Current-Limit Protection
Output Voltage Swing
Sink and source output resistances of the LMC7101 are
equal. Maximum output voltage swing is determined by the
load and the approximate output resistance. The output
resistance is:
R
IN
×
C
IN
≤
R
FB
×
C
FB
C
FB
R
FB
R
IN
V
OUT
C
IN
R
OUT
=
V
DROP
I
LOAD
V
IN
V
DROP
is the voltage dropped within the amplifier output
stage. V
DROP
and I
LOAD
can be determined from the V
O
(output swing) portion of the appropriate Electrical Character-
istics table. I
LOAD
is equal to the typical output high voltage
minus V+/2 and divided by R
LOAD
. For example, using the
Electrical Characteristics DC (5V) table, the typical output
high voltage using a 2kΩ load (connected to V+/2) is 4.989V,
which produces an I
LOAD
of
Figure 2. Cancelling Feedback Phase Lag
Since a significant percentage of C
IN
may be caused by board
layout, it is important to note that the correct value of C
FB
may
change when changing from a breadboard to the final circuit
layout.
4
.
989V – 2
.
5V
1
.
245mA
=
1
.
245mA
.
2k
Ω
Voltage drop in the amplifier output stage is:
V
DROP
= 5.0V – 4.989V
V
DROP
= 0.011V
Because of output stage symmetry, the corresponding typical
output low voltage (0.011V) also equals V
DROP
. Then:
September 1999
9
LMC7101
MICREL [ MICREL SEMICONDUCTOR ]
