Micrel, Inc.
KSZ9021RL/RN
Mode(1)
Address
Name
Description
Default
27.0
Link Up
Interrupt
1 = Link Up occurred
0 = Link Up did not occurred
RO/RC
0
Register 28 (1Ch) – Digital Debug Control 1
28.15:8
28.7
Reserved
mdi_set
RW
0000_0000
0
mdi_set has no function when swapoff (reg28.6) RW
is de-asserted.
1 = When swapoff is asserted, if mdi_set is
asserted, chip will operate at MDI mode.
0 = When swapoff is asserted, if mdi_set is de-
asserted, chip will operate at MDI-X mode.
28.6
swapoff
1 = Disable auto crossover function
0 = Enable auto crossover function
RW
0
28.5:1
28.0
Reserved
RW
RW
00_000
0
PCS Loopback 1 = Enable 10Base-T and 100Base-TX
Loopback for register 0h bit 14.
0 = normal function
Register 31 (1Fh) – PHY Control
31.15
31.14
Reserved
RW
RW
0
0
Interrupt Level
1 = Interrupt pin active high
0 = Interrupt pin active low
31.13:12
31.11:10
31.9
Reserved
RW
00
Reserved
RO/LH/RC 00
Enable Jabber
1 = Enable jabber counter
0 = Disable jabber counter
RW
1
31.8:7
31.6
Reserved
RW
RO
00
0
Speed status
1000Base-T
1 = Indicate chip final speed status at
1000Base-T
31.5
31.4
31.3
Speed status
100Base-TX
1 = Indicate chip final speed status at
100Base-TX
RO
RO
RO
0
0
0
Speed status
10Base-T
1 = Indicate chip final speed status at
10Base-T
Duplex status
Indicate chip duplex status
1 = Full-duplex
0 = Half-duplex
31.2
1000Base-T
Mater/Slave
status
1 = Indicate 1000Base-T Master mode
0 = Indicate 1000Base-T Slave mode
RO
0
31.1
31.0
Software
Reset
1 = Reset chip, except all registers
0 = Disable reset
RW
RO
0
0
Link Status
Check Fail
1 = Fail
0 = Not Failing
Note:
1. RW = Read/Write.
RC = Read-cleared
RO = Read only.
SC = Self-cleared.
LH = Latch high.
M9999-101309-1.1
October 2009
43
MICREL [ MICREL SEMICONDUCTOR ]
